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Searched refs:DFD_INTERNAL_SHIFT_CLK_RATIO (Results 1 – 10 of 10) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/dfd/
H A Dplat_dfd.h28 #define DFD_INTERNAL_SHIFT_CLK_RATIO (MISC1_CFG_BASE + 0x10) macro
H A Dplat_dfd.c31 mmio_write_32(DFD_INTERNAL_SHIFT_CLK_RATIO, 0); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/dfd/
H A Dplat_dfd.h27 #define DFD_INTERNAL_SHIFT_CLK_RATIO (MISC1_CFG_BASE + 0x10) macro
H A Dplat_dfd.c51 mmio_write_32(DFD_INTERNAL_SHIFT_CLK_RATIO, 0x0); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/drivers/dfd/mt8188/
H A Dplat_dfd.h31 #define DFD_INTERNAL_SHIFT_CLK_RATIO (MISC1_CFG_BASE + 0x10) macro
H A Dplat_dfd.c33 mmio_write_32(DFD_INTERNAL_SHIFT_CLK_RATIO, 0x0); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/dfd/
H A Dplat_dfd.h34 #define DFD_INTERNAL_SHIFT_CLK_RATIO (MISC1_CFG_BASE + 0x10) macro
H A Dplat_dfd.c68 mmio_write_32(DFD_INTERNAL_SHIFT_CLK_RATIO, 0x0); in dfd_setup()
/rk3399_ARM-atf/plat/mediatek/drivers/dfd/mt8189/
H A Dplat_dfd.c20 { DFD_INTERNAL_SHIFT_CLK_RATIO, 0x00000000 },
H A Dplat_dfd.h28 #define DFD_INTERNAL_SHIFT_CLK_RATIO (MCU_BIU_BASE + 0XE050) macro