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Searched refs:DDR_SEC_BASE (Results 1 – 9 of 9) sorted by relevance

/rk3399_ARM-atf/fdts/
H A Dstm32mp13-fw-config.dtsi17 #define DDR_SEC_BASE (STM32MP_DDR_BASE + (DDR_SIZE - DDR_SEC_SIZE)) macro
18 #define DDR_NS_SIZE (DDR_SEC_BASE - DDR_NS_BASE)
39 load-address = <0x0 DDR_SEC_BASE>;
49 DDR_SEC_BASE DDR_SEC_SIZE TZC_REGION_S_RDWR 0>;
H A Dstm32mp15-fw-config.dtsi19 #define DDR_SEC_BASE (STM32MP_DDR_BASE + (DDR_SIZE - DDR_SEC_SIZE)) macro
20 #define DDR_NS_SIZE (DDR_SEC_BASE - DDR_NS_BASE)
69 DDR_SEC_BASE DDR_SEC_SIZE TZC_REGION_S_RDWR 0
H A Dstm32mp13-fw-config-mem-encrypt.dtsi11 memory-ranges = <DDR_SEC_BASE DDR_SEC_SIZE MCE_ENCRYPT>;
/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_def.h34 #define DDR_SEC_BASE 0x3F000000 macro
41 #define DDR_SDP_BASE (DDR_SEC_BASE - 0x400000 /* align */ - \
/rk3399_ARM-atf/plat/hisilicon/hikey/include/
H A Dhikey_layout.h92 #define BL32_DRAM_BASE DDR_SEC_BASE
93 #define BL32_DRAM_LIMIT (DDR_SEC_BASE+DDR_SEC_SIZE)
H A Dhikey_def.h30 #define DDR_SEC_BASE (DDR_BASE + DDR_SIZE - DDR_SEC_SIZE) /* 0x3F000000 */ macro
33 #define DDR_SDP_BASE (DDR_SEC_BASE - 0x400000 /* align */ - \
/rk3399_ARM-atf/plat/hisilicon/hikey960/include/
H A Dplatform_def.h77 #define BL32_DRAM_BASE DDR_SEC_BASE
78 #define BL32_DRAM_LIMIT (DDR_SEC_BASE+DDR_SEC_SIZE)
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhikey_security.c106 sec_protect(DDR_SEC_BASE, DDR_SEC_SIZE, 1); in hikey_security_setup()
/rk3399_ARM-atf/plat/hisilicon/poplar/include/
H A Dplatform_def.h80 #define DDR_SEC_BASE 0x03000000 macro