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Searched refs:DDRC_RANKCTL (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/imx/imx8m/ddr/
H A Ddram_retention.c42 mmio_write_32(DDRC_RANKCTL(0) + offset, in rank_setting_update()
47 mmio_write_32(DDRC_RANKCTL(0), dram_info.rank_setting[0][2]); in rank_setting_update()
H A Ddram.c133 dram_info.rank_setting[i][2] = mmio_read_32(DDRC_RANKCTL(0) + offset); in save_rank_setting()
137 dram_info.rank_setting[0][2] = mmio_read_32(DDRC_RANKCTL(0)); in save_rank_setting()
/rk3399_ARM-atf/plat/imx/imx8m/include/
H A Dddrc.h68 #define DDRC_RANKCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf4) macro