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Searched refs:DDRC_MRSTAT (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/imx/imx8m/ddr/
H A Dddr4_dvfs.c33 while (mmio_read_32(DDRC_MRSTAT(0)) & 0x1) { in ddr4_mr_write()
37 } while (mmio_read_32(DDRC_MRSTAT(0)) & 0x1); in ddr4_mr_write()
72 while (mmio_read_32(DDRC_MRSTAT(0))) { in ddr4_mr_write()
H A Dlpddr4_dvfs.c18 while (mmio_read_32(DDRC_MRSTAT(0)) & 0x1) in lpddr4_mr_write()
76 val = mmio_read_32(DDRC_MRSTAT(0)); in lpddr4_swffc()
H A Ddram.c72 tmp = mmio_read_32(DDRC_MRSTAT(0)); in lpddr4_mr_read()
81 tmp = mmio_read_32(DDRC_MRSTAT(0)); in lpddr4_mr_read()
/rk3399_ARM-atf/plat/imx/imx8m/include/
H A Dddrc.h20 #define DDRC_MRSTAT(X) (DDRC_IPS_BASE_ADDR(X) + 0x18) macro