CTLR_ENABLE_G1S_BIT (reference) in projects: rk3399_ARM-atf

Searched refs:CTLR_ENABLE_G1S_BIT (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/drivers/arm/gic/v3/
H A D	gic600_multichip.c	`71 (CTLR_ENABLE_G0_BIT \| CTLR_ENABLE_G1S_BIT \| in set_gicd_dchipr_rt_owner() 107 (CTLR_ENABLE_G0_BIT \| CTLR_ENABLE_G1S_BIT \| in set_gicd_chipr_n() 377 (CTLR_ENABLE_G0_BIT \| CTLR_ENABLE_G1S_BIT \| in gic600_multichip_init()`
H A D	gicv3_helpers.c	`256 ctlr_enable \|= CTLR_ENABLE_G1S_BIT; in gicv3_secure_spis_config_props() 369 ctlr_enable \|= CTLR_ENABLE_G1S_BIT; in gicv3_secure_ppi_sgi_config_props()`
H A D	gicv3_main.c	`202 CTLR_ENABLE_G1S_BIT \| in gicv3_distif_init() 853 CTLR_ENABLE_G1S_BIT \| in gicv3_distif_init_restore()`
/rk3399_ARM-atf/plat/marvell/armada/a3k/common/
H A D	cm3_system_reset.c	`138 CTLR_ENABLE_G1S_BIT); in a3700_gic_reset()`
/rk3399_ARM-atf/plat/imx/imx9/common/
H A D	imx9_psci_common.c	`297 CTLR_ENABLE_G1S_BIT \| in imx_system_reset()`
/rk3399_ARM-atf/include/drivers/arm/
H A D	gicv3.h	`133 #define CTLR_ENABLE_G1S_BIT BIT_32(CTLR_ENABLE_G1S_SHIFT) macro`