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Searched refs:CLKMGR_PLLM_MDIV (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_clock_manager.h107 #define CLKMGR_PLLM_MDIV(x) ((x) & 0x000003ff) macro
/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.c120 mdiv = CLKMGR_PLLM_MDIV(hoff_ptr->main_pll_pllm); in config_clkmgr_handoff()
158 mdiv = CLKMGR_PLLM_MDIV(hoff_ptr->per_pll_pllm); in config_clkmgr_handoff()
332 mdiv = CLKMGR_PLLM_MDIV(mmio_read_32(pllm_reg)); in get_clk_freq()
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_clock_manager.h204 #define CLKMGR_PLLM_MDIV(x) ((x) & 0x000003FF) macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_clock_manager.c395 mdiv = CLKMGR_PLLM_MDIV(pllm_val); in get_ref_clk()