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Searched refs:CLKMGR_PERPLL_PLLGLOB (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.c115 mmio_clrbits_32(CLKMGR_PERPLL + CLKMGR_PERPLL_PLLGLOB, in config_clkmgr_handoff()
171 mmio_write_32(CLKMGR_PERPLL + CLKMGR_PERPLL_PLLGLOB, in config_clkmgr_handoff()
200 mmio_setbits_32(CLKMGR_PERPLL + CLKMGR_PERPLL_PLLGLOB, in config_clkmgr_handoff()
240 mmio_setbits_32(CLKMGR_PERPLL + CLKMGR_PERPLL_PLLGLOB, in config_clkmgr_handoff()
325 pllglob_reg = CLKMGR_PERPLL + CLKMGR_PERPLL_PLLGLOB; in get_clk_freq()
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dn5x_clock_manager.h48 #define CLKMGR_PERPLL_PLLGLOB 0x9c macro
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_clock_manager.h44 #define CLKMGR_PERPLL_PLLGLOB 0x20 macro
/rk3399_ARM-atf/plat/intel/soc/n5x/soc/
H A Dn5x_clock_manager.c27 clksrc = ((get_clk_freq(CLKMGR_PERPLL_PLLGLOB)) & in clk_get_pll_output_hz()
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_clock_manager.h76 #define CLKMGR_PERPLL_PLLGLOB 0x20 macro