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Searched refs:CLKMGR_PERPLL_PLLC0 (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_clock_manager.h48 #define CLKMGR_PERPLL_PLLC0 0x30 macro
/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.c181 mmio_write_32(CLKMGR_PERPLL + CLKMGR_PERPLL_PLLC0, in config_clkmgr_handoff()
397 CLKMGR_PERPLL_PLLC0); in get_mpu_clk()
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_clock_manager.h81 #define CLKMGR_PERPLL_PLLC0 0x34 macro