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Searched refs:BIT_64 (Results 1 – 10 of 10) sorted by relevance

/rk3399_ARM-atf/drivers/arm/gic/v3/
H A Dgic600_multichip_private.h21 #define GICD_CHIPRx_PUP_BIT BIT_64(1)
22 #define GICD_CHIPRx_SOCKET_STATE BIT_64(0)
25 #define GICD_CFGID_LCA_BIT BIT_64(21)
/rk3399_ARM-atf/plat/renesas/rcar_gen5/include/
H A Dplatform_def.h89 #define PLAT_PHY_ADDR_SPACE_SIZE BIT_64(33)
90 #define PLAT_VIRT_ADDR_SPACE_SIZE BIT_64(33)
/rk3399_ARM-atf/include/lib/
H A Dutils_def.h24 #define BIT_64(nr) (ULL(1) << (nr)) macro
27 #define BIT_64(nr) (((uint64_t)(1ULL)) << (nr)) macro
31 #define BIT BIT_64
52 ((~UINT64_C(0) >> (64U - 1U - (high))) ^ ((BIT_64(low) - 1U)))
/rk3399_ARM-atf/include/plat/brcm/common/
H A Dbrcm_def.h18 #define PLAT_PHY_ADDR_SPACE_SIZE BIT_64(32)
19 #define PLAT_VIRT_ADDR_SPACE_SIZE BIT_64(32)
/rk3399_ARM-atf/plat/brcm/board/common/
H A Dtimer_sync.c23 #define SAT_TMR_32BIT_WRAP_VAL (BIT_64(32) - SAT_TMR_CYCLE_DELAY)
/rk3399_ARM-atf/plat/imx/imx8ulp/scmi/
H A Dscmi_pd.c66 #define SRAM_DMA0 BIT_64(33)
67 #define SRAM_FLEXCAN BIT_64(34)
68 #define SRAM_FLEXSPI0 BIT_64(35)
69 #define SRAM_FLEXSPI1 BIT_64(36)
/rk3399_ARM-atf/include/arch/aarch64/
H A Darch.h953 #define SPSR_ALLINT_BIT_AARCH64 BIT_64(13)
954 #define SPSR_IL_BIT BIT_64(20)
955 #define SPSR_SS_BIT BIT_64(21)
956 #define SPSR_PAN_BIT BIT_64(22)
957 #define SPSR_UAO_BIT_AARCH64 BIT_64(23)
959 #define SPSR_TCO_BIT_AARCH64 BIT_64(25)
960 #define SPSR_PM_BIT_AARCH64 BIT_64(32)
962 #define SPSR_EXLOCK_BIT_AARCH64 BIT_64(34)
964 #define SPSR_PACM_BIT_AARCH64 BIT_64(35)
965 #define SPSR_UINJ_BIT BIT_64(36)
/rk3399_ARM-atf/drivers/imx/usdhc/
H A Dimx_usdhc.c25 #define ADTC_MASK_ACMD (BIT_64(51U))
215 return (ADTC_MASK_ACMD & BIT_64(cmd_idx)) != 0ULL; in is_data_transfer_cmd()
/rk3399_ARM-atf/include/drivers/arm/
H A Dgicv3.h346 #define GITS_TYPER_VSGI BIT_64(39)
/rk3399_ARM-atf/drivers/mmc/
H A Dmmc.c316 BIT_64(mmc_csd.c_size_mult + 2U) * in mmc_fill_device_info()