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Searched refs:A72 (Results 1 – 14 of 14) sorted by relevance

/rk3399_ARM-atf/plat/arm/board/juno/aarch32/
H A Djuno_helpers.S131 jump_if_cpu_midr CORTEX_A72_MIDR, A72
134 A72: label
/rk3399_ARM-atf/plat/arm/board/juno/aarch64/
H A Djuno_helpers.S135 jump_if_cpu_midr CORTEX_A72_MIDR, A72
138 A72: label
/rk3399_ARM-atf/docs/plat/
H A Drockchip.rst12 - rk3399: Hexa-Core Cortex-A53/A72
14 - rk3576: Octa-Core Cortex-A53/A72
H A Dimx8.rst7 architecture—including combined Cortex-A72 + Cortex-A53,
12 The i.MX8QM is with 2 Cortex-A72 ARM core, 4 Cortex-A53 ARM core
H A Dbrcm-stingray.rst6 Broadcom's Stingray(BCM958742t) is a multi-core processor with 8 Cortex-A72 cores.
H A Drpi4.rst5 Arm Cortex-A72 cores. Also in contrast to previous Raspberry Pi versions this
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-9.rst58 | Cortex-A72(from r1p0)|
103 this vulnerability for Cortex-A72 CPU versions that support the CSV2 feature
110 Cortex-A57, Coxtex-A72, Cortex-A73 and Cortex-A75 using the existing workaround.
H A Dsecurity-advisory-tfv-7.rst65 - Cortex-A57 and Cortex-A72, by setting bit 55 (Disable load pass store) of
H A Dsecurity-advisory-tfv-6.rst48 For Cortex-A57 and Cortex-A72 CPUs, the Pull Requests (PRs) in this advisory
/rk3399_ARM-atf/docs/plat/arm/fvp/
H A Dfvp-support.rst34 - ``FVP_Base_Cortex-A72``
/rk3399_ARM-atf/docs/plat/nxp/
H A Dnxp-layerscape.rst14 sixteen Arm® Cortex®-A72 cores with datapath acceleration optimized for
103 Arm Cortex-A72 cores with ECC-protected L1 and L2 cache memories for high
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst53 For example: `Cortex-A72 MPCore Software Developers Errata Notice`_
218 For Cortex-A72, the following errata build flags are defined :
220 - ``ERRATA_A72_859971``: This applies errata 859971 workaround to Cortex-A72
224 revisions of Cortex-A72 CPU.
1429 .. _Cortex-A72 MPCore Software Developers Errata Notice: https://developer.arm.com/documentation/ep…
/rk3399_ARM-atf/docs/
H A Dchange-log.md850 …- set snoop-delayed exclusive handling on A72 cores ([5acf82b](https://review.trustedfirmware.org/…
6328 …- set L2 cache data ram latency on A72 cores to 4 cycles ([aee2f33](https://review.trustedfirmware…
6329 …- set L2 cache ECC and and parity on A72 cores ([81858a3](https://review.trustedfirmware.org/plugi…
6330 …- set snoop-delayed exclusive handling on A72 cores ([5668db7](https://review.trustedfirmware.org/…
8591 …- apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 ([9b2510b](https://review.trustedfirmware.org/p…
8593 …- report CVE 2022 23960 missing for aarch32 A57 and A72 ([2e5d7a4](https://review.trustedfirmware.…
8598 …- workaround for CVE-2022-23960 for Cortex-A57, Cortex-A72 ([be9121f](https://review.trustedfirmwa…
9766 - Added Cortex-A72 support to `virt` platform
9783 - Enabled Cortex-A72 erratum 1319367
10012 - Include libraries for Cortex-A72
[all …]
/rk3399_ARM-atf/docs/getting_started/
H A Dbuild-options.rst1278 | 1319367 | Cortex-A72 | ``ERRATA_A72_1319367`` |