| /optee_os/core/arch/arm/mm/ |
| H A D | core_mmu_lpae.c | 535 uint64_t *tbl = NULL; in get_l1_ta_table() local
538 tbl = (void *)((vaddr_t)prtn->xlat_tables + idx * XLAT_TABLE_SIZE); in get_l1_ta_table()
539 return tbl; in get_l1_ta_table()
543 size_t core_pos, uint64_t *tbl) in set_l1_ta_table() argument
547 idx = ((vaddr_t)tbl - (vaddr_t)prtn->xlat_tables) / XLAT_TABLE_SIZE; in set_l1_ta_table()
569 uint8_t *tbl = tables; in core_alloc_mmu_prtn() local
572 assert(((vaddr_t)tbl) % SMALL_PAGE_SIZE == 0); in core_alloc_mmu_prtn()
589 prtn->base_tables = (void *)tbl; in core_alloc_mmu_prtn()
590 tbl += ROUNDUP(BASE_TABLE_SIZE * CFG_TEE_CORE_NB_CORE, SMALL_PAGE_SIZE); in core_alloc_mmu_prtn()
593 prtn->xlat_tables = (void *)tbl; in core_alloc_mmu_prtn()
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| H A D | core_mmu_v7.c | 558 void *tbl = (void *)core_mmu_get_ul1_ttb_va(get_prtn()); in core_mmu_get_user_pgdir() local
560 core_mmu_set_info_table(pgd_info, 1, 0, tbl); in core_mmu_get_user_pgdir()
583 uint32_t *tbl; in core_mmu_find_table() local
588 tbl = (uint32_t *)core_mmu_get_main_ttb_va(prtn); in core_mmu_find_table()
590 if (max_level == 1 || (tbl[n] & 0x3) != 0x1) { in core_mmu_find_table()
591 core_mmu_set_info_table(tbl_info, 1, 0, tbl); in core_mmu_find_table()
593 paddr_t ntbl = tbl[n] & ~((1 << 10) - 1); in core_mmu_find_table()
611 uint32_t *tbl = table; in core_mmu_set_entry_primitive() local
614 tbl[idx] = desc | pa; in core_mmu_set_entry_primitive()
704 const uint32_t *tbl = table; in core_mmu_get_entry_primitive() local
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| H A D | tee_pager.c | 435 core_mmu_get_entry_primitive(tblidx.pgt->tbl, TBL_LEVEL, tblidx.idx, in tblidx_get_entry()
442 core_mmu_set_entry_primitive(tblidx.pgt->tbl, TBL_LEVEL, tblidx.idx, in tblidx_set_entry()
556 pager_tables[n].pgt.tbl = pager_tables[n].tbl_info.table; in tee_pager_early_init()
798 assert(pa == virt_to_phys(pgt->tbl)); in map_pgts()
803 pa = virt_to_phys(pgt->tbl); in map_pgts()
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| /optee_os/core/mm/ |
| H A D | pgt_cache.c | 102 uint8_t *tbl = NULL; in alloc_pgt_parent() local
115 tbl = phys_to_virt(tee_mm_get_smem(parent->mm), in alloc_pgt_parent()
118 assert(tbl); /* "can't fail" */ in alloc_pgt_parent()
124 pgt[n].tbl = tbl + n * PGT_SIZE; in alloc_pgt_parent()
232 uint64_t *tbl = NULL; in pgt_clear_range() local
234 uint32_t *tbl = NULL; in pgt_clear_range() local
246 tbl = p->tbl; in pgt_clear_range()
249 memset(tbl + idx, 0, n * sizeof(*tbl)); in pgt_clear_range()
377 p->tbl = tee_pager_alloc(PGT_SIZE); in pgt_init()
395 uint8_t *tbl = tee_pager_alloc(SMALL_PAGE_SIZE); in pgt_init() local
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| H A D | vm.c | 214 ti.table = p->tbl; in set_um_region()
229 ti.table = p->tbl; in set_um_region()
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| H A D | core_mmu.c | 1911 pg_info->table = (*pgt)->tbl; in set_pg_region()
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| /optee_os/core/crypto/ |
| H A D | sub.mk | 8 srcs-y += aes-gcm-ghash-tbl.c
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| /optee_os/core/include/mm/ |
| H A D | pgt_cache.h | 25 void *tbl; member
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| /optee_os/lib/libutee/ |
| H A D | tee_api.c | 101 size_t tbl = 0; in map_tmp_param() local
136 tbl += ROUNDUP2(s, tmp_align); in map_tmp_param()
144 if (tbl) { in map_tmp_param()
145 tb = tee_map_zi(tbl, TEE_MEMORY_ACCESS_ANY_OWNER); in map_tmp_param()
149 *tmp_len = tbl; in map_tmp_param()
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| /optee_os/core/arch/arm/crypto/ |
| H A D | ghash-ce-core_a64.S | 86 tbl t3.16b, {\ad\().16b}, perm1.16b // A1
87 tbl t5.16b, {\ad\().16b}, perm2.16b // A2
88 tbl t7.16b, {\ad\().16b}, perm3.16b // A3
192 tbl sh1.16b, {SHASH.16b}, perm1.16b
193 tbl sh2.16b, {SHASH.16b}, perm2.16b
194 tbl sh3.16b, {SHASH.16b}, perm3.16b
195 tbl sh4.16b, {SHASH.16b}, T1.16b
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| H A D | sm4_armv8a_aese_a64.S | 134 tbl \x\().16b, {\low\().16b}, \x\().16b
135 tbl \tmp\().16b, {\high\().16b}, \tmp\().16b
140 tbl \des\().16b, {\src\().16b}, MASKV.16b
148 tbl \des0\().16b, {\src0\().16b}, MASKV.16b
149 tbl \des1\().16b, {\src1\().16b}, MASKV.16b
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| /optee_os/core/arch/arm/dts/ |
| H A D | stm32mp151.dtsi | 1998 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
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