Searched refs:postdiv1 (Results 1 – 2 of 2) sorted by relevance
1391 uint32_t postdiv1, uint32_t postdiv2) in stm32mp2_a35_pll1_config() argument1400 SHIFT_U32(postdiv1, in stm32mp2_a35_pll1_config()2095 uint32_t postdiv1 = 0; in clk_stm32_pll1_get_rate() local2098 postdiv1 = (reg & CA35SS_SSC_PLL_FREQ2_POSTDIV1_MASK) >> in clk_stm32_pll1_get_rate()2104 if (!postdiv1 || !postdiv2) in clk_stm32_pll1_get_rate()2107 dfout = clk_get_pll1_fvco_rate(prate) / (postdiv1 * postdiv2); in clk_stm32_pll1_get_rate()2202 uint32_t postdiv1 = 0; in clk_stm32_pll_get_rate() local2205 postdiv1 = io_read32(pllxcfgr6) & RCC_PLLxCFGR6_POSTDIV1_MASK; in clk_stm32_pll_get_rate()2209 !postdiv1 || !postdiv2) in clk_stm32_pll_get_rate()2213 prate) / (postdiv1 * postdiv2); in clk_stm32_pll_get_rate()
1409 uint32_t postdiv1, uint32_t postdiv2) in stm32mp2_a35_pll1_config() argument1418 SHIFT_U32(postdiv1, in stm32mp2_a35_pll1_config()2088 uint32_t postdiv1 = 0; in clk_stm32_pll1_get_rate() local2091 postdiv1 = (reg & CA35SS_SSC_PLL_FREQ2_POSTDIV1_MASK) >> in clk_stm32_pll1_get_rate()2097 if (!postdiv1 || !postdiv2) in clk_stm32_pll1_get_rate()2100 dfout = clk_get_pll1_fvco_rate(prate) / (postdiv1 * postdiv2); in clk_stm32_pll1_get_rate()2195 uint32_t postdiv1 = 0; in clk_stm32_pll_get_rate() local2198 postdiv1 = io_read32(pllxcfgr6) & RCC_PLLxCFGR6_POSTDIV1_MASK; in clk_stm32_pll_get_rate()2202 !postdiv1 || !postdiv2) in clk_stm32_pll_get_rate()2206 prate) / (postdiv1 * postdiv2); in clk_stm32_pll_get_rate()