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Searched refs:od (Results 1 – 4 of 4) sorted by relevance

/optee_os/core/arch/arm/crypto/
H A Dsha1_armv8a_ce_a64.S85 add_update c, od, k0, 9, 10, 11, 8
87 add_update c, od, k0, 11, 8, 9, 10
90 add_update p, od, k1, 9, 10, 11, 8
92 add_update p, od, k1, 11, 8, 9, 10
94 add_update p, od, k2, 9, 10, 11, 8
97 add_update m, od, k2, 11, 8, 9, 10
99 add_update m, od, k2, 9, 10, 11, 8
102 add_update p, od, k3, 11, 8, 9, 10
104 add_only p, od, k3, 10
106 add_only p, od
/optee_os/core/drivers/
H A Dstm32_gpio.c134 uint16_t od: 1; member
602 cfg->od = (io_read32(bank->base + GPIO_ODR_OFFSET) >> (pin << 1)) & 1; in get_gpio_cfg()
657 io_clrsetbits32(bank->base + GPIO_ODR_OFFSET, BIT(pin), cfg->od << pin); in set_gpio_cfg()
770 ref->cfg.od = odata; in get_pinctrl_from_fdt()
H A Dstm32_tamp.c141 #define _TAMP_ATCR1_ATOSEL(id, od) \ argument
142 SHIFT_U32((od) - OUT_TAMP1, ((id) - EXT_TAMP1) * 2 + 8)
152 #define _TAMP_ATCR2_ATOSEL(id, od) \ argument
153 SHIFT_U32((od) - OUT_TAMP1, ((id) - EXT_TAMP1) * 3 + 8)
/optee_os/core/arch/arm/dts/
H A Dstm32mp15-pinctrl.dtsi1390 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1515 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1569 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1693 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1747 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {