| #
2ddb3001 |
| 16-Sep-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32: refine STM32MP15 secure/non-secure I2C4 pinctrl states
Explicitly state that legacy pinctrl phandles i2c4_pins_a and i2c4_sleep_pins_a refer to non-secure I2C4 pin muxing on STM32MP15 ba
dts: stm32: refine STM32MP15 secure/non-secure I2C4 pinctrl states
Explicitly state that legacy pinctrl phandles i2c4_pins_a and i2c4_sleep_pins_a refer to non-secure I2C4 pin muxing on STM32MP15 based platforms.
Define secure I2C4 bus pinctrl states for boards that use the I2C4 bus in secure state on STM32MP15 SoCs.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
97a2d7fc |
| 19-Jul-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32: most stm32mp15 UARTs pinctrl are non-secure
On STM32MP15 based devices, UART2/3/4/5/6/7/8 cannot be secured. Explicitly state that in the pinctrl nodes. This change ease the use of a non
dts: stm32: most stm32mp15 UARTs pinctrl are non-secure
On STM32MP15 based devices, UART2/3/4/5/6/7/8 cannot be secured. Explicitly state that in the pinctrl nodes. This change ease the use of a non-secure UART for OP-TEE output console on STM32MP15 based boards.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
f55e624a |
| 02-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32mp13: update stm32mp13 SoC and board DTS files
Updates STM32MP13* SoC DTSI files and STM32MP135F-DK board DTS file and related DT binding header files.
Acked-by: Gatien Chevallier <gatien
dts: stm32mp13: update stm32mp13 SoC and board DTS files
Updates STM32MP13* SoC DTSI files and STM32MP135F-DK board DTS file and related DT binding header files.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
13bd79f4 |
| 14-Jul-2022 |
Johann Neuhauser <jneuhauser@dh-electronics.com> |
dts: stm32mp15: bump to Linux v5.19-rc6 dts files Synchronize with stm32mp15 dts(i) files from Linux v5.19-rc6.
Changes made to imported dts(i) files: - stm32mp151.dtsi: add ETZPC node, declare PSCI
dts: stm32mp15: bump to Linux v5.19-rc6 dts files Synchronize with stm32mp15 dts(i) files from Linux v5.19-rc6.
Changes made to imported dts(i) files: - stm32mp151.dtsi: add ETZPC node, declare PSCI v1.0. - stm32mp151.dtsi: add iwdg1 node as before - stm32mp151.dtsi: add iwdg2 interrupt definition - stm32mp151.dtsi: add tamp node clocks definition - stm32mp151.dtsi: keep pin-controller{,-z} node names - stm32mp157a-dk1.dts: disable RCC secure-status. - stm32mp157c-dk2.dts: disable RCC secure-status. - stm32mp157c-dk2.dts: drop cryp1 okay status - stm32mp157c-ed1.dts (included by ev1): disable RCC secure-status. - stm32mp157c-ed1.dts: (included by ev1): drop cryp1 okay status - Remove resources related to input DT bindings using explicit inline comments as those are under Linux kernel GPLv2 licensing model.
This update is required to add a new board based on Linux 5.19-rc6 dts file.
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
1bf81340 |
| 02-May-2020 |
Etienne Carriere <etienne.carriere@st.com> |
dts: stm32mp1: bump to Linux kernel v5.6.10 DTS files
Synchronize with STM32MP15 DTS files from Linux kernel v5.6.10.
Changes made on DTS/DTSI file from Linux kernel v5.6.10: - stm32mp151.dtsi: add
dts: stm32mp1: bump to Linux kernel v5.6.10 DTS files
Synchronize with STM32MP15 DTS files from Linux kernel v5.6.10.
Changes made on DTS/DTSI file from Linux kernel v5.6.10: - stm32mp151.dtsi: add ETZPC node, declare PSCI v1.0. - stm32mp157a-dk1.dts: disable RCC secure-status. - stm32mp157c-dk2.dts: disable RCC secure-status. - stm32mp157c-ed1.dts (included by ev1): disable RCC secure-status. - Remove resources related to input DT bindings using explicit inline comments as those are under Linux kernel GPLv2 licensing model.
ETZPC node useless in non-secure Linux kernel but needed by secure world.
RCC node remains disabled for the secure side so that RCC TZ hardening is disabled since mainline Linux kernel and U-Boot do not support SCMI clocks and reset domains. IWDG1, ETZPC, STGEN and CRYP1 devices are described to ease their later integration.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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