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Searched refs:mul_shift (Results 1 – 4 of 4) sorted by relevance

/optee_os/core/drivers/clk/sam/
H A Dat91_pll.c25 (((reg) >> (__layout)->mul_shift) & (__layout)->mul_mask); \
88 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_enable()
304 .mul_shift = 18,
H A Dclk-sam9x60-pll.c29 (((reg) >> (__layout)->mul_shift) & (__layout)->mul_mask); \
106 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set()
121 SHIFT_U32(frac->mul, core->layout->mul_shift) | in sam9x60_frac_pll_set()
242 SHIFT_U32(frac->mul, core->layout->mul_shift) | in sam9x60_frac_pll_set_rate_chg()
H A Dat91_clk.h71 uint8_t mul_shift; member
H A Dsama7g5_clk.c44 .mul_shift = 24,