plat-sam: add clock range support for the clocks used by SCMI

Add clock range attribute to the struct for the clocks.
New function for initializing the clock range for the clocks.
Implement "plat_sc

plat-sam: add clock range support for the clocks used by SCMI

Add clock range attribute to the struct for the clocks.
New function for initializing the clock range for the clocks.
Implement "plat_scmi_clock_rates_by_step()" to be used by SCMI.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: add the implement of CPU OPP clock

Register CPU OPP clock with the following operations:
- set_rate: call the operation of its parent
- get_rates_array: return the rates got fro

drivers: clk: sam: add the implement of CPU OPP clock

Register CPU OPP clock with the following operations:
- set_rate: call the operation of its parent
- get_rates_array: return the rates got from DT.
Skip CPU OPP clock register when OPP is not supported.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: prepare for CPU OPP (Operating Performance Points) support

Initialize clock rates array by parsing the device tree.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carr

plat-sam: prepare for CPU OPP (Operating Performance Points) support

Initialize clock rates array by parsing the device tree.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: add PLL clock driver for sama7g5

As PLL is compatible for sama7g5 and sam9x60, add sam9x60 PLL functions for
configuring sama7g5 PLL.

Signed-off-by: Tony Han <tony.han@microchip.

drivers: clk: sam: add PLL clock driver for sama7g5

As PLL is compatible for sama7g5 and sam9x60, add sam9x60 PLL functions for
configuring sama7g5 PLL.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: update to support generic clock for sama7g5

Add a mux table for select from different generic clock source.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Fori

drivers: clk: sam: update to support generic clock for sama7g5

Add a mux table for select from different generic clock source.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: update to support main system bus clock for sama7g5

Add functions for configuring sama7g5 main system bus clock.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome

drivers: clk: sam: update to support main system bus clock for sama7g5

Add functions for configuring sama7g5 main system bus clock.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: add UTMI clocks for sama7g5 USB PHY

Add functions for configuring UTMI clocks for sama7g5 USB PHY.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <je

drivers: clk: sam: add UTMI clocks for sama7g5 USB PHY

Add functions for configuring UTMI clocks for sama7g5 USB PHY.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: update UTMI clock for sama7g5

The frequency of the parent clock for UTMI is different with sama5d2.
The control of UTMI clock is different with sama5d2.

Signed-off-by: Tony Han <

drivers: clk: sam: update UTMI clock for sama7g5

The frequency of the parent clock for UTMI is different with sama5d2.
The control of UTMI clock is different with sama5d2.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: dt_driver: swap TEE_result and retrieved device reference

Changes dt_driver callback function to return a TEE_Result value
and pass retrieved device reference by a output argument rather
than

core: dt_driver: swap TEE_result and retrieved device reference

Changes dt_driver callback function to return a TEE_Result value
and pass retrieved device reference by a output argument rather
than the opposite.

This change updates dt_driver.c, dt_driver.h and all drivers
implementing related dt_driver callback function.

As a consequence, this change removes all type definition related
to device specific callback handler function types which are useless
as all these now comply with type dt_driver_probe_func defined in
dt_driver.h.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: rename dt_driver_phandle_args to dt_pargs

Renames struct dt_driver_phandle_args to struct dt_pargs to
shorten the label and prevent ugly line breaks in function
signatures.

Acked-by: Jens Wik

core: rename dt_driver_phandle_args to dt_pargs

Renames struct dt_driver_phandle_args to struct dt_pargs to
shorten the label and prevent ugly line breaks in function
signatures.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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clk: sam: sckc: add at91_sckc_clk_get() to retrieve slow clock

In order to retrieve and expose clocks through SCMI, add this function
to retrieve the SCKC clock.

Signed-off-by: Clément Léger <cleme

clk: sam: sckc: add at91_sckc_clk_get() to retrieve slow clock

In order to retrieve and expose clocks through SCMI, add this function
to retrieve the SCKC clock.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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drivers: clk: sam: add at91_pmc_clk_get() function

In order to retrieve and expose clocks through SCMI, add this function
to retrieve the clocks from the PMC.

Signed-off-by: Clément Léger <clement.

drivers: clk: sam: add at91_pmc_clk_get() function

In order to retrieve and expose clocks through SCMI, add this function
to retrieve the clocks from the PMC.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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drivers: clk: sam: add suspend support

PMC register contents needs to be restored after resuming. Add support
for this using PM callbacks.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
A

drivers: clk: sam: add suspend support

PMC register contents needs to be restored after resuming. Add support
for this using PM callbacks.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: clk: sam: expose at91_pmc_get_base

The shutdown controller needs to access the PMC to switch the clock
using assembly code. Expose pmc base using at91_pmc_get_base.

Acked-by: Etienne Carri

drivers: clk: sam: expose at91_pmc_get_base

The shutdown controller needs to access the PMC to switch the clock
using assembly code. Expose pmc base using at91_pmc_get_base.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: sam: add at91 clock interface

Add interface to all clocks that are needed to describe sama5d2 clock
tree.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Nicolas Ferre <

drivers: sam: add at91 clock interface

Add interface to all clocks that are needed to describe sama5d2 clock
tree.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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