Home
last modified time | relevance | path

Searched refs:mul_mask (Results 1 – 4 of 4) sorted by relevance

/optee_os/core/drivers/clk/sam/
H A Dat91_pll.c25 (((reg) >> (__layout)->mul_shift) & (__layout)->mul_mask); \
28 #define PLL_MUL_MASK(layout) ((layout)->mul_mask)
88 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_enable()
305 .mul_mask = 0x7F,
H A Dclk-sam9x60-pll.c29 (((reg) >> (__layout)->mul_shift) & (__layout)->mul_mask); \
32 #define PLL_MUL_MASK(layout) ((layout)->mul_mask)
106 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set()
H A Dat91_clk.h67 uint32_t mul_mask; member
H A Dsama7g5_clk.c42 .mul_mask = GENMASK_32(31, 24),