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Searched refs:DIV_CFG (Results 1 – 7 of 7) sorted by relevance

/optee_os/core/arch/arm/dts/
H A Dstm32mp215f-dk-ca35tdcid-rcc.dtsi32 DIV_CFG(DIV_LSMCU, 1)
33 DIV_CFG(DIV_APB1, 0)
34 DIV_CFG(DIV_APB2, 0)
35 DIV_CFG(DIV_APB3, 0)
36 DIV_CFG(DIV_APB4, 0)
37 DIV_CFG(DIV_APB5, 0)
38 DIV_CFG(DIV_APBDBG, 0)
H A Dstm32mp235f-dk-ca35tdcid-rcc.dtsi28 DIV_CFG(DIV_LSMCU, 1)
29 DIV_CFG(DIV_APB1, 0)
30 DIV_CFG(DIV_APB2, 0)
31 DIV_CFG(DIV_APB3, 0)
32 DIV_CFG(DIV_APB4, 0)
33 DIV_CFG(DIV_APBDBG, 0)
H A Dstm32mp257f-dk-ca35tdcid-rcc.dtsi28 DIV_CFG(DIV_LSMCU, 1)
29 DIV_CFG(DIV_APB1, 0)
30 DIV_CFG(DIV_APB2, 0)
31 DIV_CFG(DIV_APB3, 0)
32 DIV_CFG(DIV_APB4, 0)
33 DIV_CFG(DIV_APBDBG, 0)
H A Dstm32mp257f-ev1-ca35tdcid-rcc.dtsi28 DIV_CFG(DIV_LSMCU, 1)
29 DIV_CFG(DIV_APB1, 0)
30 DIV_CFG(DIV_APB2, 0)
31 DIV_CFG(DIV_APB3, 0)
32 DIV_CFG(DIV_APB4, 0)
33 DIV_CFG(DIV_APBDBG, 0)
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c537 #define DIV_CFG(_id, _offset, _shift, _width, _flags, _table)\ macro
561 DIV_CFG(DIV_PLL1DIVP, RCC_PLL1CFGR2, 0, 7, 0, NULL),
562 DIV_CFG(DIV_PLL2DIVP, RCC_PLL2CFGR2, 0, 7, 0, NULL),
563 DIV_CFG(DIV_PLL2DIVQ, RCC_PLL2CFGR2, 8, 7, 0, NULL),
564 DIV_CFG(DIV_PLL2DIVR, RCC_PLL2CFGR2, 16, 7, 0, NULL),
565 DIV_CFG(DIV_PLL3DIVP, RCC_PLL3CFGR2, 0, 7, 0, NULL),
566 DIV_CFG(DIV_PLL3DIVQ, RCC_PLL3CFGR2, 8, 7, 0, NULL),
567 DIV_CFG(DIV_PLL3DIVR, RCC_PLL3CFGR2, 16, 7, 0, NULL),
568 DIV_CFG(DIV_PLL4DIVP, RCC_PLL4CFGR2, 0, 7, 0, NULL),
569 DIV_CFG(DIV_PLL4DIVQ, RCC_PLL4CFGR2, 8, 7, 0, NULL),
[all …]
/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp21-clksrc.h43 #define DIV_CFG(div_id, div) ((CMD_DIV << CMD_SHIFT) |\ macro
H A Dstm32mp25-clksrc.h70 #define DIV_CFG(div_id, div) ((CMD_DIV << CMD_SHIFT) |\ macro