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Searched refs:CLK_SET_RATE_GATE (Results 1 – 13 of 13) sorted by relevance

/optee_os/core/drivers/clk/sam/
H A Dsama7g5_clk.c149 .flags = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
161 .flags = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
177 .flags = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
186 .flags = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
198 .flags = CLK_SET_RATE_GATE,
206 .flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE,
218 .flags = CLK_SET_RATE_GATE,
226 .flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE,
238 .flags = CLK_SET_RATE_GATE,
246 .flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE,
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H A Dat91_audio_pll.c315 clk->flags = CLK_SET_RATE_GATE; in at91_clk_register_audio_pll_frac()
346 clk->flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91_clk_register_audio_pll_pad()
377 clk->flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91_clk_register_audio_pll_pmc()
H A Dat91_plldiv.c57 clk->flags = CLK_SET_RATE_GATE; in at91_clk_register_plldiv()
H A Dat91_h32mx.c68 clk->flags = CLK_SET_RATE_GATE; in at91_clk_register_h32mx()
H A Dat91_usb.c105 clk->flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in _at91sam9x5_clk_register_usb()
H A Dat91_utmi.c128 clk->flags = CLK_SET_RATE_GATE; in at91_clk_register_utmi_internal()
H A Dat91_programmable.c154 clk->flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91_clk_register_programmable()
H A Dat91_generated.c173 clk->flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91_clk_register_generated()
H A Dat91_master.c143 clk->flags = CLK_SET_RATE_GATE; in at91_clk_register_master_internal()
H A Dat91_pll.c290 clk->flags = CLK_SET_RATE_GATE; in at91_clk_register_pll()
H A Dclk-sam9x60-pll.c502 if (flags & CLK_SET_RATE_GATE) in sam9x60_clk_register_div_pll()
/optee_os/core/include/drivers/
H A Dclk.h15 #define CLK_SET_RATE_GATE BIT(0) /* must be gated across rate change */ macro
/optee_os/core/drivers/clk/
H A Dclk.c255 if (clk->flags & CLK_SET_RATE_GATE && clk_is_enabled_no_lock(clk)) in clk_set_rate()