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Searched refs:ARRAY_SIZE (Results 1 – 25 of 98) sorted by relevance

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/optee_os/core/drivers/
H A Dstpmic1.c436 .voltage_table_size = ARRAY_SIZE(buck1_voltage_table),
448 .voltage_table_size = ARRAY_SIZE(buck2_voltage_table),
460 .voltage_table_size = ARRAY_SIZE(buck3_voltage_table),
472 .voltage_table_size = ARRAY_SIZE(buck4_voltage_table),
484 .voltage_table_size = ARRAY_SIZE(ldo1_voltage_table),
494 .voltage_table_size = ARRAY_SIZE(ldo2_voltage_table),
504 .voltage_table_size = ARRAY_SIZE(ldo3_voltage_table),
514 .voltage_table_size = ARRAY_SIZE(ldo4_voltage_table),
524 .voltage_table_size = ARRAY_SIZE(ldo5_voltage_table),
534 .voltage_table_size = ARRAY_SIZE(ldo6_voltage_table),
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H A Dls_sfp.c232 for (uint32_t i = 0; i < ARRAY_SIZE(sfp_regs->fspfr); ++i) in ls_sfp_read()
235 for (uint32_t i = 0; i < ARRAY_SIZE(sfp_regs->otpmkr); ++i) in ls_sfp_read()
238 for (uint32_t i = 0; i < ARRAY_SIZE(sfp_regs->srkhr); ++i) in ls_sfp_read()
241 for (uint32_t i = 0; i < ARRAY_SIZE(sfp_regs->ouidr); ++i) in ls_sfp_read()
288 if (index >= ARRAY_SIZE(sfp_regs->ouidr)) { in ls_sfp_get_ouid()
290 index, ARRAY_SIZE(sfp_regs->ouidr)); in ls_sfp_get_ouid()
325 if (index >= ARRAY_SIZE(sfp_regs->srkhr)) { in ls_sfp_get_srkh()
327 index, ARRAY_SIZE(sfp_regs->srkhr)); in ls_sfp_get_srkh()
387 if (index >= ARRAY_SIZE(sfp_regs->ouidr)) { in ls_sfp_set_ouid()
389 index, ARRAY_SIZE(sfp_regs->ouidr)); in ls_sfp_set_ouid()
H A Dimx_i2c.c99 uint32_t i2c[ARRAY_SIZE(i2c_bus)];
100 uint32_t cgrbm[ARRAY_SIZE(i2c_bus)];
116 } i2c[ARRAY_SIZE(i2c_bus)];
198 struct ifdr_pair *q = p + ARRAY_SIZE(ifdr_table) - 1; in i2c_set_prescaler()
386 if (bid >= ARRAY_SIZE(i2c_bus)) in imx_i2c_read()
409 if (bid >= ARRAY_SIZE(i2c_bus)) in imx_i2c_write()
430 if (bid >= ARRAY_SIZE(i2c_bus)) in imx_i2c_probe()
451 if (bid >= ARRAY_SIZE(i2c_bus)) in imx_i2c_init()
503 for (i = 0; i < ARRAY_SIZE(i2c_bus); i++) { in i2c_mapped()
531 for (i = 0; i < ARRAY_SIZE(dt_i2c_match_table); i++) { in i2c_map_controller()
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H A Dversal_mbox.c152 if (api < ARRAY_SIZE(crypto_id)) in versal_mbox_call_trace()
157 if (api < ARRAY_SIZE(fpga_id)) in versal_mbox_call_trace()
162 if (api < ARRAY_SIZE(nvm_id)) in versal_mbox_call_trace()
167 if (api < ARRAY_SIZE(puf_id)) in versal_mbox_call_trace()
H A Dls_sec_mon.c144 for (uint32_t i = 0; i < ARRAY_SIZE(data->lpzmkr); ++i) in ls_sec_mon_read()
147 for (uint32_t i = 0; i < ARRAY_SIZE(data->lpgpr); ++i) in ls_sec_mon_read()
H A Dstm32_tamp.c1843 if (id >= 0 && ((size_t)id < ARRAY_SIZE(itamper_name))) in stm32_tamp_itamper_action()
2231 .int_tamp_size = ARRAY_SIZE(int_tamp_mp13),
2233 .ext_tamp_size = ARRAY_SIZE(ext_tamp_mp13),
2235 .pin_map_size = ARRAY_SIZE(pin_map_mp13),
2244 .int_tamp_size = ARRAY_SIZE(int_tamp_mp15),
2246 .ext_tamp_size = ARRAY_SIZE(ext_tamp_mp15),
2248 .pin_map_size = ARRAY_SIZE(pin_map_mp15),
2264 .int_tamp_size = ARRAY_SIZE(int_tamp_mp21),
2266 .ext_tamp_size = ARRAY_SIZE(ext_tamp_mp21),
2268 .pin_map_size = ARRAY_SIZE(pin_map_mp21),
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/optee_os/core/drivers/clk/sam/
H A Dsama5d2_clk.c20 #define PARENT_SIZE ARRAY_SIZE(sama5d2_systemck)
42 .num_output = ARRAY_SIZE(plla_outputs),
350 COMPILE_TIME_ASSERT(ARRAY_SIZE(sama5d2_systemck) == PARENT_SIZE); in pmc_setup()
368 ARRAY_SIZE(sama5d2_systemck), in pmc_setup()
369 ARRAY_SIZE(sama5d2_perick) + in pmc_setup()
370 ARRAY_SIZE(sama5d2_peri32ck), in pmc_setup()
371 ARRAY_SIZE(sama5d2_gck), in pmc_setup()
372 ARRAY_SIZE(sama5d2_progck)); in pmc_setup()
496 for (i = 0; i < ARRAY_SIZE(sama5d2_progck); i++) { in pmc_setup()
519 for (i = 0; i < ARRAY_SIZE(sama5d2_systemck); i++) { in pmc_setup()
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H A Dsama7g5_clk.c81 .num_output = ARRAY_SIZE(cpu_pll_output),
88 .num_output = ARRAY_SIZE(pll_output),
1301 ARRAY_SIZE(sama7g5_systemck), in pmc_setup_sama7g5()
1302 ARRAY_SIZE(peri_clks), in pmc_setup_sama7g5()
1303 ARRAY_SIZE(sama7g5_gcks), 8); in pmc_setup_sama7g5()
1421 for (i = 0; i < ARRAY_SIZE(sama7g5_mckx); i++) { in pmc_setup_sama7g5()
1459 for (i = 0; i < ARRAY_SIZE(sama7_utmick); i++) { in pmc_setup_sama7g5()
1485 for (i = 0; i < ARRAY_SIZE(sama7g5_progck); i++) { in pmc_setup_sama7g5()
1498 for (i = 0; i < ARRAY_SIZE(sama7g5_systemck); i++) { in pmc_setup_sama7g5()
1511 for (i = 0; i < ARRAY_SIZE(peri_clks); i++) { in pmc_setup_sama7g5()
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/optee_os/ta/pkcs11/src/
H A Dtoken_capabilities.c163 for (n = 0; n < ARRAY_SIZE(pkcs11_modes); n++) in mechanism_string_id()
178 for (n = 0; n < ARRAY_SIZE(pkcs11_modes); n++) in mechanism_is_valid()
195 for (n = 0; n < ARRAY_SIZE(pkcs11_modes); n++) { in mechanism_flags_complies_pkcs11()
214 for (n = 0; n < ARRAY_SIZE(pkcs11_modes); n++) in mechanism_is_one_shot_only()
312 for (n = 0; n < ARRAY_SIZE(token_mechanism); n++) in tee_malloc_mechanism_list()
325 for (n = 0; n < ARRAY_SIZE(token_mechanism); n++) { in tee_malloc_mechanism_list()
340 for (n = 0; n < ARRAY_SIZE(token_mechanism); n++) { in mechanism_supported_flags()
H A Dpkcs11_attributes.c513 ARRAY_SIZE(any_object_boolprops)); in create_storage_attributes()
518 ARRAY_SIZE(any_object_opt_or_null)); in create_storage_attributes()
542 ARRAY_SIZE(any_key_boolprops)); in create_genkey_attributes()
547 ARRAY_SIZE(any_key_opt_or_null)); in create_genkey_attributes()
552 ARRAY_SIZE(any_key_optional)); in create_genkey_attributes()
587 ARRAY_SIZE(symm_key_boolprops)); in create_symm_key_attributes()
592 ARRAY_SIZE(symm_key_opt_or_null)); in create_symm_key_attributes()
597 ARRAY_SIZE(symm_key_optional)); in create_symm_key_attributes()
614 ARRAY_SIZE(raw_data_opt_or_null)); in create_data_attributes()
641 ARRAY_SIZE(pkcs11_certificate_boolprops)); in create_certificate_attributes()
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/optee_os/core/arch/arm/plat-stm32mp1/drivers/
H A Dstm32mp1_pmic.c143 for (i = 0; i < ARRAY_SIZE(regu_lp_state); i++) in regu_lp_state2idx()
499 static struct regulator pmic_regulators[ARRAY_SIZE(pmic_regu_name_ids)];
500 static struct pmic_regulator_data pmic_regu_cfg[ARRAY_SIZE(pmic_regu_name_ids)];
507 for (n = 0; n < ARRAY_SIZE(pmic_regulators); n++) { in release_voltage_lists()
528 for (i = 0; i < ARRAY_SIZE(pmic_regu_name_ids); i++) in stm32mp_pmic_get_regulator()
544 for (i = 0; i < ARRAY_SIZE(pmic_regu_name_ids); i++) in register_pmic_regulator()
547 if (i >= ARRAY_SIZE(pmic_regu_name_ids)) { in register_pmic_regulator()
599 for (n = 0; n < ARRAY_SIZE(regu_lp_state); n++) in parse_regulator_fdt_nodes()
H A Dstm32mp1_pwr.c178 if (id < ARRAY_SIZE(pwr_regu_device)) in stm32mp1_pwr_get_regulator()
263 for (n = 0; n < ARRAY_SIZE(stm32mp1_pwr_regu_dt_desc); n++) in stm32mp1_pwr_regu_probe()
267 if (n >= ARRAY_SIZE(stm32mp1_pwr_regu_dt_desc)) { in stm32mp1_pwr_regu_probe()
/optee_os/core/drivers/crypto/caam/hal/imx_6_7/
H A Dhal_ctrl.c44 caam_pwr_add_backup(baseaddr, ctrl_backup, ARRAY_SIZE(ctrl_backup)); in caam_hal_ctrl_init()
/optee_os/core/drivers/crypto/crypto_api/oid/
H A Dhash_oid.c36 if (main_alg < ARRAY_SIZE(drvcrypt_hash_oid)) in drvcrypt_get_alg_hash_oid()
/optee_os/core/arch/arm/plat-stm32mp1/
H A Dscmi_server.c356 .clock_count = ARRAY_SIZE(stm32_scmi_clock),
358 .rd_count = ARRAY_SIZE(stm32_scmi_reset_domain),
360 .voltd_count = ARRAY_SIZE(scmi_voltage_domain),
363 .perfd_count = ARRAY_SIZE(scmi_performance_domain),
370 assert(channel_id < ARRAY_SIZE(scmi_channel)); in find_resource()
377 const size_t max_id = ARRAY_SIZE(scmi_channel); in plat_scmi_get_channel()
390 const size_t channel_count = ARRAY_SIZE(scmi_channel); in plat_scmi_protocol_count_paranoid()
447 const size_t count = ARRAY_SIZE(plat_protocol_list) - 1; in plat_scmi_protocol_count()
457 (ARRAY_SIZE(plat_protocol_list) - 1)); in plat_scmi_protocol_list()
1112 for (i = 0; i < ARRAY_SIZE(scmi_channel); i++) { in stm32mp1_init_scmi_server()
/optee_os/core/drivers/clk/
H A Dclk-stm32mp15.c153 for (n = 0; n < ARRAY_SIZE(parent_id_clock_id); n++) in clock_id2parent_id()
310 .nb_parent = ARRAY_SIZE(_parent) \
329 #define NB_GATES ARRAY_SIZE(stm32mp1_clk_gate)
579 if (idx >= ARRAY_SIZE(stm32mp1_osc)) { in osc_frequency()
1085 for (idx = 0; idx < ARRAY_SIZE(secure_enable); idx++) in enable_static_secure_clocks()
1157 static struct clk stm32mp1_clk[ARRAY_SIZE(stm32mp1_clk_gate) +
1158 ARRAY_SIZE(stm32mp1_clk_on)];
1160 #define CLK_ON_INDEX_OFFSET ((int)ARRAY_SIZE(stm32mp1_clk_gate))
1166 assert(clk_index >= 0 && clk_index < (int)ARRAY_SIZE(stm32mp1_clk)); in clk_is_gate()
1194 for (n = 0; n < ARRAY_SIZE(stm32mp1_clk_gate); n++) in clock_id_to_gate_index()
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/optee_os/core/arch/arm/plat-sam/
H A Dscmi_server.c58 .rd_count = ARRAY_SIZE(sam_scmi_reset_domain),
64 assert(channel_id < ARRAY_SIZE(scmi_channel)); in find_resource()
71 const size_t max_id = ARRAY_SIZE(scmi_channel); in plat_scmi_get_channel()
102 return ARRAY_SIZE(plat_protocol_list) - 1; in plat_scmi_protocol_count()
1044 for (i = 0; i < ARRAY_SIZE(pmc_clks); i++) { in sam_init_scmi_clk()
1135 for (p = pmc_clks; p < pmc_clks + ARRAY_SIZE(pmc_clks); p++) { in sam_set_clock_range()
1154 for (p = pmc_clks; p < pmc_clks + ARRAY_SIZE(pmc_clks); p++) { in plat_scmi_clock_rates_by_step()
1177 for (i = 0; i < ARRAY_SIZE(scmi_channel); i++) { in sam_init_scmi_server()
/optee_os/core/arch/arm/plat-zynq7k/
H A Dmain.c165 for (i = 0; i < ARRAY_SIZE(slcr_access_range); i += 2) { in write_slcr()
186 for (i = 0; i < ARRAY_SIZE(slcr_access_range); i += 2) { in read_slcr()
/optee_os/core/drivers/scmi-msg/
H A Dbase.c176 return message_id < ARRAY_SIZE(scmi_base_handler_table) && in message_id_is_supported()
182 const size_t array_size = ARRAY_SIZE(scmi_base_handler_table); in scmi_msg_get_base_handler()
H A Dreset_domain.c177 return message_id < ARRAY_SIZE(scmi_rd_handler_table) && in message_id_is_supported()
183 const size_t array_size = ARRAY_SIZE(scmi_rd_handler_table); in scmi_msg_get_rd_handler()
H A Dperf_domain.c319 ret_nb = MIN(ARRAY_SIZE(plat_levels), nb_levels - in_args->level_index); in scmi_perf_describe_levels()
390 return message_id < ARRAY_SIZE(scmi_perf_handler_table) && in message_id_is_supported()
396 const size_t array_size = ARRAY_SIZE(scmi_perf_handler_table); in scmi_msg_get_perf_handler()
/optee_os/core/arch/arm/plat-vexpress/
H A Dvendor_props.c70 .len = ARRAY_SIZE(vendor_propset_array_tee),
/optee_os/core/arch/arm/kernel/
H A Drpc_io_i2c.c45 res = thread_rpc_cmd(OPTEE_RPC_CMD_I2C_TRANSFER, ARRAY_SIZE(p), p); in rpc_io_i2c_transfer()
/optee_os/core/kernel/
H A Dscall.c197 static_assert(ARRAY_SIZE(tee_syscall_table) == (TEE_SCN_MAX + 1)); in get_tee_syscall_func()
243 COMPILE_TIME_ASSERT(ARRAY_SIZE(ldelf_syscall_table) == in get_ldelf_syscall_func()
/optee_os/core/arch/arm/plat-rockchip/
H A Dplatform_rk3588.c187 for (i = 0; i < ARRAY_SIZE(buffer); i++) { in generate_huk()
235 for (i = 0; i < ARRAY_SIZE(buffer); i++) { in read_huk()

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