1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2017-2023, STMicroelectronics
4 */
5
6 #include <assert.h>
7 #include <drivers/i2c.h>
8 #include <drivers/regulator.h>
9 #include <drivers/stm32_i2c.h>
10 #include <drivers/stm32mp1_pmic.h>
11 #include <drivers/stpmic1.h>
12 #include <drivers/stpmic1_regulator.h>
13 #include <io.h>
14 #include <keep.h>
15 #include <kernel/boot.h>
16 #include <kernel/delay.h>
17 #include <kernel/dt.h>
18 #include <kernel/panic.h>
19 #include <kernel/pm.h>
20 #include <libfdt.h>
21 #include <mm/core_memprot.h>
22 #include <platform_config.h>
23 #include <stdbool.h>
24 #include <stdlib.h>
25 #include <stm32_util.h>
26 #include <trace.h>
27 #include <util.h>
28
29 #define MODE_STANDBY 8
30
31 #define PMIC_I2C_TRIALS 1
32 #define PMIC_I2C_TIMEOUT_BUSY_MS 5
33
34 #define PMIC_REGU_SUPPLY_NAME_LEN 12
35
36 #define PMIC_REGU_COUNT 14
37
38 enum {
39 PMIC_REGU_FLAG_MASK_RESET = 0,
40 PMIC_REGU_FLAG_COUNT
41 };
42
43 static_assert(IS_ENABLED(CFG_DRIVERS_REGULATOR));
44 static_assert(PMIC_REGU_FLAG_COUNT <= UINT_MAX);
45
46 /*
47 * struct pmic_regulator_data - Platform specific data
48 * @flags: Flags for platform property to apply
49 * @regu_name: Regulator name ID in stpmic1 driver
50 * @voltages_desc: Supported levels description
51 * @voltages_level: Pointer to supported levels or NULL if not yet allocated
52 */
53 struct pmic_regulator_data {
54 unsigned int flags;
55 char *regu_name;
56 struct regulator_voltages_desc voltages_desc;
57 int *voltages_level;
58 };
59
60 /* Expect a single PMIC instance */
61 static struct i2c_handle_s *i2c_handle;
62 static uint32_t pmic_i2c_addr;
63 static int pmic_status = -1;
64
65 /* CPU voltage supplier if found */
66 static char cpu_supply_name[PMIC_REGU_SUPPLY_NAME_LEN];
67
stm32mp_with_pmic(void)68 bool stm32mp_with_pmic(void)
69 {
70 return pmic_status > 0;
71 }
72
init_pmic_state(const void * fdt,int pmic_node)73 static void init_pmic_state(const void *fdt, int pmic_node)
74 {
75 pmic_status = fdt_get_status(fdt, pmic_node);
76 }
77
dt_pmic_is_secure(void)78 static bool dt_pmic_is_secure(void)
79 {
80 return stm32mp_with_pmic() && i2c_is_secure(i2c_handle);
81 }
82
priv_dt_properties(const void * fdt,int regu_node,struct pmic_regulator_data * priv)83 static void priv_dt_properties(const void *fdt, int regu_node,
84 struct pmic_regulator_data *priv)
85 {
86 const char *name = fdt_get_name(fdt, regu_node, NULL);
87
88 assert(name);
89 priv->regu_name = strdup(name);
90 if (!priv->regu_name)
91 panic();
92
93 if (fdt_getprop(fdt, regu_node, "st,mask-reset", NULL))
94 priv->flags |= PMIC_REGU_FLAG_MASK_RESET;
95 }
96
97 /*
98 * @flags: Operations expected when entering a low power sequence
99 * @voltage: Target voltage to apply during low power sequences
100 */
101 struct regu_lp_config {
102 uint8_t flags;
103 struct stpmic1_lp_cfg cfg;
104 };
105
106 #define REGU_LP_FLAG_LOAD_PWRCTRL BIT(0)
107 #define REGU_LP_FLAG_ON_IN_SUSPEND BIT(1)
108 #define REGU_LP_FLAG_OFF_IN_SUSPEND BIT(2)
109 #define REGU_LP_FLAG_SET_VOLTAGE BIT(3)
110 #define REGU_LP_FLAG_MODE_STANDBY BIT(4)
111
112 /*
113 * struct regu_lp_state - Low power configuration for regulators
114 * @name: low power state identifier string name
115 * @cfg_count: number of regulator configuration instance in @cfg
116 * @cfg: regulator configurations for low power state @name
117 */
118 struct regu_lp_state {
119 const char *name;
120 size_t cfg_count;
121 struct regu_lp_config *cfg;
122 };
123
124 enum regu_lp_state_id {
125 REGU_LP_STATE_DISK = 0,
126 REGU_LP_STATE_STANDBY,
127 REGU_LP_STATE_MEM,
128 REGU_LP_STATE_MEM_LOWVOLTAGE,
129 REGU_LP_STATE_COUNT
130 };
131
132 static struct regu_lp_state regu_lp_state[REGU_LP_STATE_COUNT] = {
133 [REGU_LP_STATE_DISK] = { .name = "standby-ddr-off", },
134 [REGU_LP_STATE_STANDBY] = { .name = "standby-ddr-sr", },
135 [REGU_LP_STATE_MEM] = { .name = "lp-stop", },
136 [REGU_LP_STATE_MEM_LOWVOLTAGE] = { .name = "lplv-stop", },
137 };
138
regu_lp_state2idx(const char * name)139 static unsigned int regu_lp_state2idx(const char *name)
140 {
141 unsigned int i = 0;
142
143 for (i = 0; i < ARRAY_SIZE(regu_lp_state); i++)
144 if (!strcmp(name, regu_lp_state[i].name))
145 return i;
146
147 panic();
148 }
149
dt_get_regu_low_power_config(const void * fdt,const char * regu_name,int regu_node,const char * lp_state)150 static void dt_get_regu_low_power_config(const void *fdt, const char *regu_name,
151 int regu_node, const char *lp_state)
152 {
153 unsigned int state_idx = regu_lp_state2idx(lp_state);
154 struct regu_lp_state *state = regu_lp_state + state_idx;
155 const fdt32_t *cuint = NULL;
156 int regu_state_node = 0;
157 struct regu_lp_config *regu_cfg = NULL;
158
159 state->cfg_count++;
160 state->cfg = realloc(state->cfg,
161 state->cfg_count * sizeof(*state->cfg));
162 if (!state->cfg)
163 panic();
164
165 regu_cfg = &state->cfg[state->cfg_count - 1];
166
167 memset(regu_cfg, 0, sizeof(*regu_cfg));
168
169 if (stpmic1_regu_has_lp_cfg(regu_name)) {
170 if (stpmic1_lp_cfg(regu_name, ®u_cfg->cfg)) {
171 DMSG("Cannot setup low power for regu %s", regu_name);
172 panic();
173 }
174 /*
175 * Always copy active configuration (Control register)
176 * to PWRCTRL Control register, even if regu_state_node
177 * does not exist.
178 */
179 regu_cfg->flags |= REGU_LP_FLAG_LOAD_PWRCTRL;
180 }
181
182 /* Parse regulator stte node if any */
183 regu_state_node = fdt_subnode_offset(fdt, regu_node, lp_state);
184 if (regu_state_node <= 0)
185 return;
186
187 if (fdt_getprop(fdt, regu_state_node,
188 "regulator-on-in-suspend", NULL))
189 regu_cfg->flags |= REGU_LP_FLAG_ON_IN_SUSPEND;
190
191 if (fdt_getprop(fdt, regu_state_node,
192 "regulator-off-in-suspend", NULL))
193 regu_cfg->flags |= REGU_LP_FLAG_OFF_IN_SUSPEND;
194
195 cuint = fdt_getprop(fdt, regu_state_node,
196 "regulator-suspend-microvolt", NULL);
197 if (cuint) {
198 uint32_t mv = fdt32_to_cpu(*cuint) / 1000U;
199
200 if (stpmic1_lp_voltage_cfg(regu_name, mv, ®u_cfg->cfg)) {
201 DMSG("Cannot set voltage for %s", regu_name);
202 panic();
203 }
204 regu_cfg->flags |= REGU_LP_FLAG_SET_VOLTAGE;
205 }
206
207 cuint = fdt_getprop(fdt, regu_state_node,
208 "regulator-mode", NULL);
209 if (cuint && fdt32_to_cpu(*cuint) == MODE_STANDBY)
210 regu_cfg->flags |= REGU_LP_FLAG_MODE_STANDBY;
211 }
212
213 /*
214 * int stm32mp_pmic_set_lp_config(char *lp_state)
215 *
216 * Load the low power configuration stored in regu_lp_state[].
217 */
stm32mp_pmic_apply_lp_config(const char * lp_state)218 void stm32mp_pmic_apply_lp_config(const char *lp_state)
219 {
220 unsigned int state_idx = regu_lp_state2idx(lp_state);
221 struct regu_lp_state *state = ®u_lp_state[state_idx];
222 size_t i = 0;
223
224 if (stpmic1_powerctrl_on())
225 panic();
226
227 for (i = 0; i < state->cfg_count; i++) {
228 struct stpmic1_lp_cfg *cfg = &state->cfg[i].cfg;
229
230 if ((state->cfg[i].flags & REGU_LP_FLAG_LOAD_PWRCTRL) &&
231 stpmic1_lp_load_unpg(cfg))
232 panic();
233
234 if ((state->cfg[i].flags & REGU_LP_FLAG_ON_IN_SUSPEND) &&
235 stpmic1_lp_on_off_unpg(cfg, 1))
236 panic();
237
238 if ((state->cfg[i].flags & REGU_LP_FLAG_OFF_IN_SUSPEND) &&
239 stpmic1_lp_on_off_unpg(cfg, 0))
240 panic();
241
242 if ((state->cfg[i].flags & REGU_LP_FLAG_SET_VOLTAGE) &&
243 stpmic1_lp_voltage_unpg(cfg))
244 panic();
245
246 if ((state->cfg[i].flags & REGU_LP_FLAG_MODE_STANDBY) &&
247 stpmic1_lp_mode_unpg(cfg, 1))
248 panic();
249 }
250 }
251
252 /* Return a libfdt compliant status value */
save_cpu_supply_name(void)253 static int save_cpu_supply_name(void)
254 {
255 void *fdt = NULL;
256 int node = 0;
257 const fdt32_t *cuint = NULL;
258 const char *name = NULL;
259
260 fdt = get_embedded_dt();
261 if (!fdt)
262 panic();
263
264 node = fdt_path_offset(fdt, "/cpus/cpu@0");
265 if (node < 0)
266 return -FDT_ERR_NOTFOUND;
267
268 cuint = fdt_getprop(fdt, node, "cpu-supply", NULL);
269 if (!cuint)
270 return -FDT_ERR_NOTFOUND;
271
272 node = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*cuint));
273 if (node < 0)
274 return -FDT_ERR_NOTFOUND;
275
276 name = fdt_get_name(fdt, node, NULL);
277 assert(strnlen(name, sizeof(cpu_supply_name)) <
278 sizeof(cpu_supply_name));
279
280 strncpy(cpu_supply_name, name, sizeof(cpu_supply_name));
281
282 return 0;
283 }
284
stm32mp_pmic_get_cpu_supply_name(void)285 const char *stm32mp_pmic_get_cpu_supply_name(void)
286 {
287 return cpu_supply_name;
288 }
289
pmic_set_state(struct regulator * regulator,bool enable)290 static TEE_Result pmic_set_state(struct regulator *regulator, bool enable)
291 {
292 struct pmic_regulator_data *priv = regulator->priv;
293 int ret = 0;
294
295 stm32mp_get_pmic();
296
297 if (enable)
298 ret = stpmic1_regulator_enable(priv->regu_name);
299 else
300 ret = stpmic1_regulator_disable(priv->regu_name);
301
302 stm32mp_put_pmic();
303
304 if (ret)
305 return TEE_ERROR_GENERIC;
306
307 return TEE_SUCCESS;
308 }
309
pmic_get_state(struct regulator * regulator,bool * enabled)310 static TEE_Result pmic_get_state(struct regulator *regulator, bool *enabled)
311 {
312 struct pmic_regulator_data *priv = regulator->priv;
313
314 stm32mp_get_pmic();
315 *enabled = stpmic1_is_regulator_enabled(priv->regu_name);
316 stm32mp_put_pmic();
317
318 return TEE_SUCCESS;
319 }
320
pmic_get_voltage(struct regulator * regulator,int * level_uv)321 static TEE_Result pmic_get_voltage(struct regulator *regulator, int *level_uv)
322 {
323 struct pmic_regulator_data *priv = regulator->priv;
324 int rc = 0;
325
326 stm32mp_get_pmic();
327 rc = stpmic1_regulator_voltage_get(priv->regu_name);
328 stm32mp_put_pmic();
329
330 if (rc < 0)
331 return TEE_ERROR_GENERIC;
332
333 *level_uv = rc * 1000;
334
335 return TEE_SUCCESS;
336 }
337
pmic_set_voltage(struct regulator * regulator,int level_uv)338 static TEE_Result pmic_set_voltage(struct regulator *regulator, int level_uv)
339 {
340 struct pmic_regulator_data *priv = regulator->priv;
341 unsigned int level_mv = level_uv / 1000;
342 int rc = 0;
343
344 if (level_mv > UINT16_MAX)
345 return TEE_ERROR_BAD_PARAMETERS;
346
347 stm32mp_get_pmic();
348 rc = stpmic1_regulator_voltage_set(priv->regu_name, level_mv);
349 stm32mp_put_pmic();
350
351 if (rc)
352 return TEE_ERROR_GENERIC;
353
354 return TEE_SUCCESS;
355 }
356
refine_levels_array(size_t count,int * levels_uv,int min_uv,int max_uv)357 static size_t refine_levels_array(size_t count, int *levels_uv,
358 int min_uv, int max_uv)
359 {
360 size_t n = 0;
361 size_t m = 0;
362
363 /* We need to sort the array has STPMIC1 driver does not */
364 qsort_int(levels_uv, count);
365
366 /* Remove duplicates and return optimized count */
367 for (n = 1; n < count; n++) {
368 if (levels_uv[m] != levels_uv[n]) {
369 if (m + 1 != n)
370 levels_uv[m + 1] = levels_uv[n];
371 m++;
372 }
373 }
374 count = m + 1;
375
376 for (n = count; n; n--)
377 if (levels_uv[n - 1] <= max_uv)
378 break;
379 count = n;
380
381 for (n = 0; n < count; n++)
382 if (levels_uv[n] >= min_uv)
383 break;
384 count -= n;
385
386 memmove(levels_uv, levels_uv + n, count * sizeof(*levels_uv));
387
388 return count;
389 }
390
pmic_list_voltages(struct regulator * regulator,struct regulator_voltages_desc ** out_desc,const int ** out_levels)391 static TEE_Result pmic_list_voltages(struct regulator *regulator,
392 struct regulator_voltages_desc **out_desc,
393 const int **out_levels)
394 {
395 struct pmic_regulator_data *priv = regulator->priv;
396
397 if (!priv->voltages_level) {
398 const uint16_t *level_ref = NULL;
399 size_t level_count = 0;
400 int *levels2 = NULL;
401 int *levels = NULL;
402 size_t n = 0;
403
404 /*
405 * Allocate and build a consised and ordered voltage list
406 * based on the voltage list provided by stpmic1 driver.
407 */
408 stpmic1_regulator_levels_mv(priv->regu_name, &level_ref,
409 &level_count);
410
411 levels = calloc(level_count, sizeof(*levels));
412 if (!levels)
413 return TEE_ERROR_OUT_OF_MEMORY;
414 for (n = 0; n < level_count; n++)
415 levels[n] = level_ref[n] * 1000;
416
417 level_count = refine_levels_array(level_count, levels,
418 regulator->min_uv,
419 regulator->max_uv);
420
421 /* Shrink levels array to not waste heap memory */
422 levels2 = realloc(levels, sizeof(*levels) * level_count);
423 if (!levels2) {
424 free(levels);
425 return TEE_ERROR_OUT_OF_MEMORY;
426 }
427
428 priv->voltages_desc.type = VOLTAGE_TYPE_FULL_LIST;
429 priv->voltages_desc.num_levels = level_count;
430 priv->voltages_level = levels2;
431 }
432
433 *out_desc = &priv->voltages_desc;
434 *out_levels = priv->voltages_level;
435
436 return TEE_SUCCESS;
437 }
438
pmic_regu_init(struct regulator * regulator,const void * fdt __unused,int node __unused)439 static TEE_Result pmic_regu_init(struct regulator *regulator,
440 const void *fdt __unused, int node __unused)
441 {
442 struct pmic_regulator_data *priv = regulator->priv;
443 struct stpmic1_bo_cfg cfg = { };
444
445 if (!priv->flags)
446 return TEE_SUCCESS;
447
448 stm32mp_get_pmic();
449
450 if (priv->flags & PMIC_REGU_FLAG_MASK_RESET) {
451 if (stpmic1_bo_mask_reset_cfg(priv->regu_name, &cfg) ||
452 stpmic1_bo_mask_reset_unpg(&cfg)) {
453 EMSG("Mask reset failed for %s", priv->regu_name);
454 return TEE_ERROR_GENERIC;
455 }
456 }
457
458 if (regulator->flags & REGULATOR_PULL_DOWN) {
459 if (stpmic1_bo_pull_down_cfg(priv->regu_name, &cfg) ||
460 stpmic1_bo_pull_down_unpg(&cfg)) {
461 EMSG("Pull down failed for %s", priv->regu_name);
462 return TEE_ERROR_GENERIC;
463 }
464 }
465
466 stm32mp_put_pmic();
467
468 return TEE_SUCCESS;
469 }
470
471 static const struct regulator_ops pmic_regu_ops = {
472 .set_state = pmic_set_state,
473 .get_state = pmic_get_state,
474 .set_voltage = pmic_set_voltage,
475 .get_voltage = pmic_get_voltage,
476 .supported_voltages = pmic_list_voltages,
477 .supplied_init = pmic_regu_init,
478 };
479 DECLARE_KEEP_PAGER(pmic_regu_ops);
480
481 static const struct regulator_ops pmic_sw_ops = {
482 .set_state = pmic_set_state,
483 .get_state = pmic_get_state,
484 .supplied_init = pmic_regu_init,
485 };
486 DECLARE_KEEP_PAGER(pmic_sw_ops);
487
488 /*
489 * STPMIC1 regulator names, used in the DT as regulator node name and
490 * provider node <name>-supply property,
491 */
492 static const char * const pmic_regu_name_ids[] = {
493 "buck1", "buck2", "buck3", "buck4",
494 "ldo1", "ldo2", "ldo3", "ldo4", "ldo5", "ldo6",
495 "vref_ddr", "boost", "pwr_sw1", "pwr_sw2"
496 };
497
498 /* Preallocated regulator instances */
499 static struct regulator pmic_regulators[ARRAY_SIZE(pmic_regu_name_ids)];
500 static struct pmic_regulator_data pmic_regu_cfg[ARRAY_SIZE(pmic_regu_name_ids)];
501
release_voltage_lists(void)502 static TEE_Result release_voltage_lists(void)
503 {
504 size_t n = 0;
505
506 /* Voltage list will be rebuilt at runtime if needed at least once */
507 for (n = 0; n < ARRAY_SIZE(pmic_regulators); n++) {
508 struct pmic_regulator_data *priv = pmic_regulators[n].priv;
509
510 if (priv && priv->voltages_level) {
511 free(priv->voltages_level);
512 priv->voltages_level = NULL;
513 }
514 }
515
516 return TEE_SUCCESS;
517 }
518
519 release_init_resource(release_voltage_lists);
520
stm32mp_pmic_get_regulator(const char * name)521 struct regulator *stm32mp_pmic_get_regulator(const char *name)
522 {
523 size_t i = 0;
524
525 if (!name)
526 return NULL;
527
528 for (i = 0; i < ARRAY_SIZE(pmic_regu_name_ids); i++)
529 if (!strcmp(pmic_regu_name_ids[i], name) &&
530 pmic_regulators[i].ops)
531 return pmic_regulators + i;
532
533 return NULL;
534 }
535
register_pmic_regulator(const void * fdt,const char * regu_name,int regu_node,int regulators_node)536 static TEE_Result register_pmic_regulator(const void *fdt,
537 const char *regu_name, int regu_node,
538 int regulators_node)
539 {
540 TEE_Result res = TEE_ERROR_GENERIC;
541 struct regu_dt_desc desc = { };
542 size_t i = 0;
543
544 for (i = 0; i < ARRAY_SIZE(pmic_regu_name_ids); i++)
545 if (!strcmp(pmic_regu_name_ids[i], regu_name))
546 break;
547 if (i >= ARRAY_SIZE(pmic_regu_name_ids)) {
548 EMSG("Unknown regulator name %s", regu_name);
549 panic();
550 }
551
552 desc = (struct regu_dt_desc){
553 .name = pmic_regu_name_ids[i],
554 .supply_name = pmic_regu_name_ids[i],
555 .regulator = pmic_regulators + i,
556 .priv = pmic_regu_cfg + i,
557 };
558
559 priv_dt_properties(fdt, regu_node, pmic_regu_cfg + i);
560
561 /*
562 * pwr_sw1 and pwr_sw2 are regulator switches hence have no
563 * set_voltage.get_voltage handler.
564 */
565 if (!strncmp(regu_name, "pwr_sw", 6))
566 desc.ops = &pmic_sw_ops;
567 else
568 desc.ops = &pmic_regu_ops;
569
570 res = regulator_dt_register(fdt, regu_node, regulators_node, &desc);
571 if (res)
572 EMSG("Failed to register %s, error: %#"PRIx32, regu_name, res);
573
574 return res;
575 }
576
parse_regulator_fdt_nodes(const void * fdt,int pmic_node)577 static void parse_regulator_fdt_nodes(const void *fdt, int pmic_node)
578 {
579 int regulators_node = 0;
580 int regu_node = 0;
581
582 regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators");
583 if (regulators_node < 0)
584 panic();
585
586 fdt_for_each_subnode(regu_node, fdt, regulators_node) {
587 int status = fdt_get_status(fdt, regu_node);
588 const char *regu_name = NULL;
589 size_t n = 0;
590
591 assert(status >= 0);
592 if (status == DT_STATUS_DISABLED)
593 continue;
594
595 regu_name = fdt_get_name(fdt, regu_node, NULL);
596
597 assert(stpmic1_regulator_is_valid(regu_name));
598
599 for (n = 0; n < ARRAY_SIZE(regu_lp_state); n++)
600 dt_get_regu_low_power_config(fdt, regu_name, regu_node,
601 regu_lp_state[n].name);
602
603 if (register_pmic_regulator(fdt, regu_name, regu_node,
604 regulators_node))
605 panic();
606 }
607
608 if (save_cpu_supply_name())
609 DMSG("No CPU supply provided");
610 }
611
612 /*
613 * PMIC and resource initialization
614 */
615
initialize_pmic_i2c(const void * fdt,int pmic_node)616 static void initialize_pmic_i2c(const void *fdt, int pmic_node)
617 {
618 const fdt32_t *cuint = NULL;
619
620 cuint = fdt_getprop(fdt, pmic_node, "reg", NULL);
621 if (!cuint) {
622 EMSG("PMIC configuration failed on reg property");
623 panic();
624 }
625
626 pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1;
627 if (pmic_i2c_addr > UINT16_MAX) {
628 EMSG("PMIC configuration failed on i2c address translation");
629 panic();
630 }
631
632 stm32mp_get_pmic();
633
634 if (!stm32_i2c_is_device_ready(i2c_handle, pmic_i2c_addr,
635 PMIC_I2C_TRIALS,
636 PMIC_I2C_TIMEOUT_BUSY_MS))
637 panic();
638
639 stpmic1_bind_i2c(i2c_handle, pmic_i2c_addr);
640
641 stm32mp_put_pmic();
642 }
643
644 /*
645 * Automated suspend/resume at system suspend/resume is expected
646 * only when the PMIC is secure. If it is non secure, only atomic
647 * execution context can get/put the PMIC resources.
648 */
pmic_pm(enum pm_op op,uint32_t pm_hint __unused,const struct pm_callback_handle * pm_handle __unused)649 static TEE_Result pmic_pm(enum pm_op op, uint32_t pm_hint __unused,
650 const struct pm_callback_handle *pm_handle __unused)
651 {
652 if (op == PM_OP_SUSPEND)
653 stm32_i2c_suspend(i2c_handle);
654 else
655 stm32_i2c_resume(i2c_handle);
656
657 return TEE_SUCCESS;
658 }
659 DECLARE_KEEP_PAGER(pmic_pm);
660
661 /* stm32mp_get/put_pmic allows secure atomic sequences to use non secure PMIC */
stm32mp_get_pmic(void)662 void stm32mp_get_pmic(void)
663 {
664 stm32_i2c_resume(i2c_handle);
665 }
666
stm32mp_put_pmic(void)667 void stm32mp_put_pmic(void)
668 {
669 stm32_i2c_suspend(i2c_handle);
670 }
671
initialize_pmic(const void * fdt,int pmic_node)672 static TEE_Result initialize_pmic(const void *fdt, int pmic_node)
673 {
674 unsigned long pmic_version = 0;
675
676 init_pmic_state(fdt, pmic_node);
677
678 initialize_pmic_i2c(fdt, pmic_node);
679
680 stm32mp_get_pmic();
681
682 if (stpmic1_get_version(&pmic_version))
683 panic("Failed to access PMIC");
684
685 DMSG("PMIC version = 0x%02lx", pmic_version);
686 stm32mp_put_pmic();
687
688 if (dt_pmic_is_secure())
689 register_pm_driver_cb(pmic_pm, NULL, "stm32mp1-pmic");
690
691 parse_regulator_fdt_nodes(fdt, pmic_node);
692
693 return TEE_SUCCESS;
694 }
695
stm32_pmic_probe(const void * fdt,int node,const void * compat_data __unused)696 static TEE_Result stm32_pmic_probe(const void *fdt, int node,
697 const void *compat_data __unused)
698 {
699 struct stm32_i2c_dev *stm32_i2c_dev = NULL;
700 struct i2c_dev *i2c_dev = NULL;
701 TEE_Result res = TEE_SUCCESS;
702
703 res = i2c_dt_get_dev(fdt, node, &i2c_dev);
704 if (res)
705 return res;
706
707 stm32_i2c_dev = container_of(i2c_dev, struct stm32_i2c_dev, i2c_dev);
708 i2c_handle = stm32_i2c_dev->handle;
709
710 res = initialize_pmic(fdt, node);
711 if (res) {
712 DMSG("Unexpectedly failed to get I2C bus: %#"PRIx32, res);
713 panic();
714 }
715
716 return TEE_SUCCESS;
717 }
718
719 static const struct dt_device_match stm32_pmic_match_table[] = {
720 { .compatible = "st,stpmic1" },
721 { }
722 };
723
724 DEFINE_DT_DRIVER(stm32_pmic_dt_driver) = {
725 .name = "st,stpmic1",
726 .match_table = stm32_pmic_match_table,
727 .probe = stm32_pmic_probe,
728 };
729