| /OK3568_Linux_fs/kernel/arch/x86/hyperv/ |
| H A D | hv_init.c | 114 wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, val); in hv_cpu_init() 141 wrmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status); in hyperv_stop_tsc_emulation() 189 wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl)); in set_hv_tscchange_cb() 190 wrmsrl(HV_X64_MSR_TSC_EMULATION_CONTROL, *((u64 *)&emu_ctrl)); in set_hv_tscchange_cb() 205 wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl); in clear_hv_tscchange_cb() 227 wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, 0); in hv_cpu_die() 246 wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl)); in hv_cpu_die() 286 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); in hv_suspend() 305 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); in hv_resume() 404 wrmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id); in hyperv_init() [all …]
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| /OK3568_Linux_fs/kernel/arch/x86/events/intel/ |
| H A D | uncore_nhmex.c | 202 wrmsrl(NHMEX_U_MSR_PMON_GLOBAL_CTL, NHMEX_U_PMON_GLOBAL_EN_ALL); in nhmex_uncore_msr_init_box() 207 wrmsrl(NHMEX_U_MSR_PMON_GLOBAL_CTL, 0); in nhmex_uncore_msr_exit_box() 221 wrmsrl(msr, config); in nhmex_uncore_msr_disable_box() 236 wrmsrl(msr, config); in nhmex_uncore_msr_enable_box() 242 wrmsrl(event->hw.config_base, 0); in nhmex_uncore_msr_disable_event() 250 wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0); in nhmex_uncore_msr_enable_event() 252 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22); in nhmex_uncore_msr_enable_event() 254 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0); in nhmex_uncore_msr_enable_event() 384 wrmsrl(reg1->reg, reg1->config); in nhmex_bbox_msr_enable_event() 385 wrmsrl(reg1->reg + 1, reg2->config); in nhmex_bbox_msr_enable_event() [all …]
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| H A D | uncore_snb.c | 146 wrmsrl(hwc->config_base, hwc->config | SNB_UNC_CTL_EN); in snb_uncore_msr_enable_event() 148 wrmsrl(hwc->config_base, SNB_UNC_CTL_EN); in snb_uncore_msr_enable_event() 153 wrmsrl(event->hw.config_base, 0); in snb_uncore_msr_disable_event() 159 wrmsrl(SNB_UNC_PERF_GLOBAL_CTL, in snb_uncore_msr_init_box() 166 wrmsrl(SNB_UNC_PERF_GLOBAL_CTL, in snb_uncore_msr_enable_box() 173 wrmsrl(SNB_UNC_PERF_GLOBAL_CTL, 0); in snb_uncore_msr_exit_box() 258 wrmsrl(SKL_UNC_PERF_GLOBAL_CTL, in skl_uncore_msr_init_box() 269 wrmsrl(SKL_UNC_PERF_GLOBAL_CTL, in skl_uncore_msr_enable_box() 276 wrmsrl(SKL_UNC_PERF_GLOBAL_CTL, 0); in skl_uncore_msr_exit_box() 1100 wrmsrl(NHM_UNC_PERF_GLOBAL_CTL, 0); in nhm_uncore_msr_disable_box() [all …]
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| H A D | lbr.c | 207 wrmsrl(MSR_LBR_SELECT, lbr_select); in __intel_pmu_lbr_enable() 225 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); in __intel_pmu_lbr_enable() 228 wrmsrl(MSR_ARCH_LBR_CTL, lbr_select | ARCH_LBR_CTL_LBREN); in __intel_pmu_lbr_enable() 236 wrmsrl(MSR_ARCH_LBR_CTL, 0); in __intel_pmu_lbr_disable() 242 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); in __intel_pmu_lbr_disable() 250 wrmsrl(x86_pmu.lbr_from + i, 0); in intel_pmu_lbr_reset_32() 258 wrmsrl(x86_pmu.lbr_from + i, 0); in intel_pmu_lbr_reset_64() 259 wrmsrl(x86_pmu.lbr_to + i, 0); in intel_pmu_lbr_reset_64() 261 wrmsrl(x86_pmu.lbr_info + i, 0); in intel_pmu_lbr_reset_64() 268 wrmsrl(MSR_ARCH_LBR_DEPTH, x86_pmu.lbr_nr); in intel_pmu_arch_lbr_reset() [all …]
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| H A D | knc.c | 164 wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val); in knc_pmu_disable_all() 173 wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val); in knc_pmu_enable_all() 210 wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_OVF_CONTROL, ack); in knc_pmu_ack_status()
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| /OK3568_Linux_fs/kernel/arch/x86/oprofile/ |
| H A D | op_model_amd.c | 156 wrmsrl(MSR_AMD64_IBSFETCHCTL, ctl); in op_amd_handle_ibs() 185 wrmsrl(MSR_AMD64_IBSOPCTL, ctl); in op_amd_handle_ibs() 211 wrmsrl(MSR_AMD64_IBSFETCHCTL, val); in op_amd_start_ibs() 248 wrmsrl(MSR_AMD64_IBSOPCTL, val); in op_amd_start_ibs() 259 wrmsrl(MSR_AMD64_IBSFETCHCTL, 0); in op_amd_stop_ibs() 263 wrmsrl(MSR_AMD64_IBSOPCTL, 0); in op_amd_stop_ibs() 282 wrmsrl(msrs->controls[i].addr, val); in op_mux_switch_ctrl() 356 wrmsrl(msrs->controls[i].addr, val); in op_amd_setup_ctrs() 361 wrmsrl(msrs->counters[i].addr, -1LL); in op_amd_setup_ctrs() 371 wrmsrl(msrs->counters[i].addr, -(u64)reset_value[virt]); in op_amd_setup_ctrs() [all …]
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| H A D | op_model_ppro.c | 103 wrmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs() 108 wrmsrl(msrs->counters[i].addr, -1LL); in ppro_setup_ctrs() 115 wrmsrl(msrs->counters[i].addr, -reset_value[i]); in ppro_setup_ctrs() 119 wrmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs() 140 wrmsrl(msrs->counters[i].addr, -reset_value[i]); in ppro_check_ctrs() 167 wrmsrl(msrs->controls[i].addr, val); in ppro_start() 183 wrmsrl(msrs->controls[i].addr, val); in ppro_stop()
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| /OK3568_Linux_fs/kernel/arch/x86/include/asm/ |
| H A D | mshyperv.h | 18 wrmsrl(HV_X64_MSR_STIMER0_COUNT + (2*timer), tick) 20 wrmsrl(HV_X64_MSR_STIMER0_CONFIG + (2*timer), val) 23 #define hv_set_simp(val) wrmsrl(HV_X64_MSR_SIMP, val) 26 #define hv_set_siefp(val) wrmsrl(HV_X64_MSR_SIEFP, val) 29 #define hv_set_synic_state(val) wrmsrl(HV_X64_MSR_SCONTROL, val) 33 #define hv_signal_eom() wrmsrl(HV_X64_MSR_EOM, 0) 38 wrmsrl(HV_X64_MSR_SINT0 + int_num, val) 51 wrmsrl(HV_X64_MSR_REFERENCE_TSC, val)
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| H A D | virtext.h | 121 wrmsrl(MSR_VM_HSAVE_PA, 0); in cpu_svm_disable() 123 wrmsrl(MSR_EFER, efer & ~EFER_SVME); in cpu_svm_disable()
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| /OK3568_Linux_fs/u-boot/arch/x86/cpu/ |
| H A D | mtrr.c | 33 wrmsrl(MTRR_DEF_TYPE_MSR, state->deftype & ~MTRR_DEF_TYPE_EN); in mtrr_open() 42 wrmsrl(MTRR_DEF_TYPE_MSR, state->deftype | MTRR_DEF_TYPE_EN); in mtrr_close() 61 wrmsrl(MTRR_PHYS_BASE_MSR(i), req->start | req->type); in mtrr_commit() 62 wrmsrl(MTRR_PHYS_MASK_MSR(i), mask | MTRR_PHYS_MASK_VALID); in mtrr_commit() 67 wrmsrl(MTRR_PHYS_MASK_MSR(i), 0); in mtrr_commit()
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| /OK3568_Linux_fs/kernel/arch/x86/kernel/cpu/mce/ |
| H A D | inject.c | 462 wrmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus); in prepare_msrs() 466 wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(b), m.status); in prepare_msrs() 467 wrmsrl(MSR_AMD64_SMCA_MCx_DEADDR(b), m.addr); in prepare_msrs() 469 wrmsrl(MSR_AMD64_SMCA_MCx_STATUS(b), m.status); in prepare_msrs() 470 wrmsrl(MSR_AMD64_SMCA_MCx_ADDR(b), m.addr); in prepare_msrs() 473 wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), m.misc); in prepare_msrs() 474 wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), m.synd); in prepare_msrs() 476 wrmsrl(MSR_IA32_MCx_STATUS(b), m.status); in prepare_msrs() 477 wrmsrl(MSR_IA32_MCx_ADDR(b), m.addr); in prepare_msrs() 478 wrmsrl(MSR_IA32_MCx_MISC(b), m.misc); in prepare_msrs()
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| H A D | intel.c | 171 wrmsrl(MSR_IA32_MCx_CTL2(bank), val); in cmci_toggle_interrupt_mode() 309 wrmsrl(MSR_IA32_MCx_CTL2(i), val); in cmci_discover() 364 wrmsrl(MSR_IA32_MCx_CTL2(bank), val); in __cmci_disable_bank() 458 wrmsrl(MSR_IA32_MCG_EXT_CTL, val | MCG_EXT_CTL_LMCE_EN); in intel_init_lmce() 470 wrmsrl(MSR_IA32_MCG_EXT_CTL, val); in intel_clear_lmce()
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| /OK3568_Linux_fs/kernel/arch/x86/power/ |
| H A D | cpu.c | 57 wrmsrl(msr->info.msr_no, msr->info.reg.q); in msr_restore_context() 201 wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable); in __restore_processor_state() 211 wrmsrl(MSR_EFER, ctxt->efer); in __restore_processor_state() 234 wrmsrl(MSR_GS_BASE, ctxt->kernelmode_gs_base); in __restore_processor_state() 258 wrmsrl(MSR_FS_BASE, ctxt->fs_base); in __restore_processor_state() 259 wrmsrl(MSR_KERNEL_GS_BASE, ctxt->usermode_gs_base); in __restore_processor_state() 293 wrmsrl(MSR_GS_BASE, saved_context.kernelmode_gs_base); in restore_processor_state()
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| /OK3568_Linux_fs/kernel/arch/x86/kernel/ |
| H A D | kvm.c | 300 wrmsrl(MSR_KVM_ASYNC_PF_ACK, 1); in DEFINE_IDTENTRY_SYSVEC() 326 wrmsrl(MSR_KVM_STEAL_TIME, (slow_virt_to_phys(st) | KVM_MSR_ENABLED)); in kvm_register_steal_time() 360 wrmsrl(MSR_KVM_ASYNC_PF_INT, HYPERVISOR_CALLBACK_VECTOR); in kvm_guest_cpu_init() 362 wrmsrl(MSR_KVM_ASYNC_PF_EN, pa); in kvm_guest_cpu_init() 375 wrmsrl(MSR_KVM_PV_EOI_EN, pa); in kvm_guest_cpu_init() 387 wrmsrl(MSR_KVM_ASYNC_PF_EN, 0); in kvm_pv_disable_apf() 409 wrmsrl(MSR_KVM_PV_EOI_EN, 0); in kvm_pv_guest_cpu_reboot() 483 wrmsrl(MSR_KVM_PV_EOI_EN, 0); in kvm_guest_cpu_offline() 659 wrmsrl(MSR_KVM_POLL_CONTROL, 0); in kvm_resume() 1024 wrmsrl(MSR_KVM_POLL_CONTROL, 0); in kvm_disable_host_haltpoll() [all …]
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| H A D | process.c | 276 wrmsrl(MSR_MISC_FEATURES_ENABLES, msrval); in set_cpuid_faulting() 491 wrmsrl(MSR_AMD64_LS_CFG, msr); in amd_set_core_ssb_state() 508 wrmsrl(MSR_AMD64_LS_CFG, msr); in amd_set_core_ssb_state() 518 wrmsrl(MSR_AMD64_LS_CFG, msr); in amd_set_core_ssb_state() 527 wrmsrl(MSR_AMD64_LS_CFG, msr); in amd_set_core_ssb_state() 537 wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn)); in amd_set_ssb_virt_state() 644 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); in __switch_to_xtra()
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| H A D | tsc_sync.c | 72 wrmsrl(MSR_IA32_TSC_ADJUST, adj->adjusted); in tsc_verify_tsc_adjust() 144 wrmsrl(MSR_IA32_TSC_ADJUST, 0); in tsc_sanitize_first_cpu() 233 wrmsrl(MSR_IA32_TSC_ADJUST, ref->adjusted); in tsc_store_and_check_tsc_adjust() 529 wrmsrl(MSR_IA32_TSC_ADJUST, cur->adjusted); in check_tsc_sync_target()
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| /OK3568_Linux_fs/u-boot/arch/x86/lib/ |
| H A D | cmd_mtrr.c | 78 wrmsrl(MTRR_PHYS_BASE_MSR(reg), base); in do_mtrr_set() 79 wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); in do_mtrr_set() 96 wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); in mtrr_set_valid()
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| /OK3568_Linux_fs/u-boot/arch/x86/include/asm/ |
| H A D | msr.h | 128 #define wrmsrl(msr, val) \ macro 138 wrmsrl(msr, val); in msr_clrsetbits_64() 147 wrmsrl(msr, val); in msr_setbits_64() 156 wrmsrl(msr, val); in msr_clrbits_64()
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| /OK3568_Linux_fs/kernel/drivers/video/fbdev/geode/ |
| H A D | video_gx.c | 154 wrmsrl(MSR_GLCP_DOTPLL, dotpll); in gx_set_dclk_frequency() 162 wrmsrl(MSR_GLCP_SYS_RSTPLL, sys_rstpll); in gx_set_dclk_frequency() 166 wrmsrl(MSR_GLCP_DOTPLL, dotpll); in gx_set_dclk_frequency() 186 wrmsrl(MSR_GX_MSR_PADSEL, val); in gx_configure_tft()
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| /OK3568_Linux_fs/u-boot/arch/x86/cpu/coreboot/ |
| H A D | coreboot.c | 59 wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0); in board_final_cleanup() 60 wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0); in board_final_cleanup()
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| /OK3568_Linux_fs/kernel/arch/x86/xen/ |
| H A D | suspend.c | 44 wrmsrl(MSR_IA32_SPEC_CTRL, this_cpu_read(spec_ctrl)); in xen_vcpu_notify_restore() 62 wrmsrl(MSR_IA32_SPEC_CTRL, 0); in xen_vcpu_notify_suspend()
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| /OK3568_Linux_fs/kernel/drivers/cpufreq/ |
| H A D | longhaul.c | 147 wrmsrl(MSR_VIA_BCR2, bcr2.val); in do_longhaul1() 156 wrmsrl(MSR_VIA_BCR2, bcr2.val); in do_longhaul1() 183 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); in do_powersaver() 197 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); in do_powersaver() 202 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); in do_powersaver() 215 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); in do_powersaver() 220 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); in do_powersaver() 234 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); in do_powersaver()
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| /OK3568_Linux_fs/kernel/arch/x86/kernel/cpu/ |
| H A D | tsx.c | 39 wrmsrl(MSR_IA32_TSX_CTRL, tsx); in tsx_disable() 58 wrmsrl(MSR_IA32_TSX_CTRL, tsx); in tsx_enable()
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| /OK3568_Linux_fs/kernel/arch/x86/events/zhaoxin/ |
| H A D | core.c | 257 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0); in zhaoxin_pmu_disable_all() 262 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl); in zhaoxin_pmu_enable_all() 276 wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack); in zhaoxin_pmu_ack_status() 298 wrmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_disable_fixed() 335 wrmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_enable_fixed()
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| /OK3568_Linux_fs/kernel/drivers/platform/x86/intel_speed_select_if/ |
| H A D | isst_if_mbox_msr.c | 57 wrmsrl(MSR_OS_MAILBOX_DATA, command_data); in isst_if_send_mbox_cmd() 64 wrmsrl(MSR_OS_MAILBOX_INTERFACE, data); in isst_if_send_mbox_cmd()
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