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Searched refs:vco_hz (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3066.c113 uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; in rkclk_set_pll() local
114 uint output_hz = vco_hz / div->no; in rkclk_set_pll()
117 (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
118 assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && in rkclk_set_pll()
H A Dclk_rk3188.c111 uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; in rkclk_set_pll() local
112 uint output_hz = vco_hz / div->no; in rkclk_set_pll()
115 (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
116 assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && in rkclk_set_pll()
H A Dclk_rk3036.c69 uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000; in rkclk_set_pll() local
70 uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; in rkclk_set_pll()
75 div->postdiv2, vco_hz, output_hz); in rkclk_set_pll()
76 assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && in rkclk_set_pll()
H A Dclk_rv1108.c72 uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000; in rkclk_set_pll() local
73 uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; in rkclk_set_pll()
77 div->postdiv2, vco_hz, output_hz); in rkclk_set_pll()
78 assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && in rkclk_set_pll()
H A Dclk_px30.c219 uint vco_hz, output_hz; in rkclk_set_pll() local
228 vco_hz = OSC_HZ / 1000 * rate->fbdiv / rate->refdiv * 1000; in rkclk_set_pll()
229 output_hz = vco_hz / rate->postdiv1 / rate->postdiv2; in rkclk_set_pll()
233 rate->postdiv2, vco_hz, output_hz); in rkclk_set_pll()
234 assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && in rkclk_set_pll()
H A Dclk_rk3288.c241 uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; in rkclk_set_pll() local
242 uint output_hz = vco_hz / div->no; in rkclk_set_pll()
245 (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
H A Dclk_rk3368.c254 uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; in rkclk_set_pll() local
255 uint output_hz = vco_hz / div->no; in rkclk_set_pll()
258 pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()