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Searched refs:uint8_t (Results 1 – 25 of 2612) sorted by relevance

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/OK3568_Linux_fs/external/security/rk_tee_user/v2/host/xtest/nist/
H A Decccdhtestvectors.h8 static const uint8_t nist_kas_ecc_cdh_testvector_1_public_x[] = {
13 static const uint8_t nist_kas_ecc_cdh_testvector_1_public_y[] = {
18 static const uint8_t nist_kas_ecc_cdh_testvector_1_private[] = {
25 static const uint8_t nist_kas_ecc_cdh_testvector_1_out[] = {
31 static const uint8_t nist_kas_ecc_cdh_testvector_2_public_x[] = {
36 static const uint8_t nist_kas_ecc_cdh_testvector_2_public_y[] = {
41 static const uint8_t nist_kas_ecc_cdh_testvector_2_private[] = {
48 static const uint8_t nist_kas_ecc_cdh_testvector_2_out[] = {
54 static const uint8_t nist_kas_ecc_cdh_testvector_3_public_x[] = {
59 static const uint8_t nist_kas_ecc_cdh_testvector_3_public_y[] = {
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H A D186-2ecdsatestvectors.h5 static const uint8_t nist_186_2_ecdsa_testvector_1_ptx[] = {
19 static const uint8_t nist_186_2_ecdsa_testvector_1_private[] = {
24 static const uint8_t nist_186_2_ecdsa_testvector_1_public_x[] = {
29 static const uint8_t nist_186_2_ecdsa_testvector_1_public_y[] = {
35 static const uint8_t nist_186_2_ecdsa_testvector_1_out[] = {
43 static const uint8_t nist_186_2_ecdsa_testvector_2_ptx[] = {
57 static const uint8_t nist_186_2_ecdsa_testvector_2_private[] = {
62 static const uint8_t nist_186_2_ecdsa_testvector_2_public_x[] = {
67 static const uint8_t nist_186_2_ecdsa_testvector_2_public_y[] = {
73 static const uint8_t nist_186_2_ecdsa_testvector_2_out[] = {
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H A D186-3dsatestvectors.h8 static const uint8_t ac_dsa_vect1_prime[] = {
22 static const uint8_t ac_dsa_vect1_sub_prime[] = {
27 static const uint8_t ac_dsa_vect1_base[] = {
41 static const uint8_t ac_dsa_vect1_ptx[] = {
55 static const uint8_t ac_dsa_vect1_priv_val[] = {
60 static const uint8_t ac_dsa_vect1_pub_val[] = {
75 static const uint8_t ac_dsa_vect1_out[] = {
86 static const uint8_t ac_dsa_vect2_ptx[] = {
100 static const uint8_t ac_dsa_vect2_priv_val[] = {
105 static const uint8_t ac_dsa_vect2_pub_val[] = {
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/
H A Ddc_dp_types.h105 uint8_t link_rate_set;
138 uint8_t MINOR:4;
139 uint8_t MAJOR:4;
141 uint8_t raw;
146 uint8_t MAX_LANE_COUNT:5;
147 uint8_t POST_LT_ADJ_REQ_SUPPORTED:1;
148 uint8_t TPS3_SUPPORTED:1;
149 uint8_t ENHANCED_FRAME_CAP:1;
151 uint8_t raw;
156 uint8_t MAX_DOWN_SPREAD:1;
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/
H A Datomfirmware.h52 #ifndef uint8_t
53 typedef unsigned char uint8_t; typedef
228 …uint8_t format_revision; //mainly used for a hw function, when the parser is not backward compa…
229 …uint8_t content_revision; //change it when a data table has a structure change, or a hw function…
238 …uint8_t atom_bios_string[4]; //enum atom_string_def atom_bios_string; //Signature to d…
441 uint8_t h_border;
442 uint8_t v_border;
444 uint8_t atom_mode_id;
445 uint8_t refreshrate;
484 uint8_t mem_module_id;
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/OK3568_Linux_fs/kernel/drivers/scsi/megaraid/
H A Dmbox_defs.h158 uint8_t cmd;
159 uint8_t cmdid;
163 uint8_t logdrv;
164 uint8_t numsge;
165 uint8_t resvd;
166 uint8_t busy;
167 uint8_t numstatus;
168 uint8_t status;
169 uint8_t completed[MBOX_MAX_FIRMWARE_STATUS];
170 uint8_t poll;
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/OK3568_Linux_fs/external/security/rk_tee_user/v2/host/xtest/
H A Dregression_4000_data.h23 static const uint8_t ciph_data_aes_xts_vect1_key1[] = {
27 static const uint8_t ciph_data_aes_xts_vect1_key2[] = {
31 static const uint8_t ciph_data_aes_xts_vect1_iv[16] = {
34 static const uint8_t ciph_data_aes_xts_vect1_ptx[] = {
41 static const uint8_t ciph_data_aes_xts_vect1_ctx[] = {
49 static const uint8_t ciph_data_aes_xts_vect2_key1[] = {
53 static const uint8_t ciph_data_aes_xts_vect2_key2[] = {
57 static const uint8_t ciph_data_aes_xts_vect2_iv[16] = {
60 static const uint8_t ciph_data_aes_xts_vect2_ptx[] = {
67 static const uint8_t ciph_data_aes_xts_vect2_ctx[] = {
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/inc/
H A Dsmu7_fusion.h46 uint8_t DisplayPhy1Config;
47 uint8_t DisplayPhy2Config;
48 uint8_t DisplayPhy3Config;
49 uint8_t DisplayPhy4Config;
51 uint8_t DisplayPhy5Config;
52 uint8_t DisplayPhy6Config;
53 uint8_t DisplayPhy7Config;
54 uint8_t DisplayPhy8Config;
60 uint8_t SClkDpmEnabledLevels;
61 uint8_t MClkDpmEnabledLevels;
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H A Dsmu74_discrete.h44 uint8_t vco_setting;
45 uint8_t postdiv;
55 uint8_t Smio;
56 uint8_t padding;
72 uint8_t PllRange;
73 uint8_t SSc_En;
85 uint8_t pcieDpmLevel;
86 uint8_t DeepSleepDivId;
92 uint8_t SclkDid;
93 uint8_t padding;
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H A Dsmu73_discrete.h33 uint8_t Smio;
34 uint8_t padding;
51 uint8_t pcieDpmLevel;
52 uint8_t DeepSleepDivId;
60 uint8_t SclkDid;
61 uint8_t DisplayWatermark;
62 uint8_t EnabledForActivity;
63 uint8_t EnabledForThrottle;
64 uint8_t UpHyst;
65 uint8_t DownHyst;
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H A Dsmu75_discrete.h43 uint8_t vco_setting; /* 1: 3-6GHz, 3: 2-4GHz */
44 uint8_t postdiv; /* divide by 2^n */
53 uint8_t Smio;
54 uint8_t padding;
70 uint8_t PllRange;
71 uint8_t SSc_En;
84 uint8_t pcieDpmLevel;
85 uint8_t DeepSleepDivId;
93 uint8_t SclkDid;
94 uint8_t padding;
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H A Dsmu71_discrete.h41 uint8_t Smio;
42 uint8_t padding;
54 uint8_t pcieDpmLevel;
55 uint8_t DeepSleepDivId;
64 uint8_t SclkDid;
65 uint8_t DisplayWatermark;
66 uint8_t EnabledForActivity;
67 uint8_t EnabledForThrottle;
68 uint8_t UpHyst;
69 uint8_t DownHyst;
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H A Dsmu7_discrete.h55 uint8_t DisplayPhy1Config;
56 uint8_t DisplayPhy2Config;
57 uint8_t DisplayPhy3Config;
58 uint8_t DisplayPhy4Config;
60 uint8_t DisplayPhy5Config;
61 uint8_t DisplayPhy6Config;
62 uint8_t DisplayPhy7Config;
63 uint8_t DisplayPhy8Config;
69 uint8_t SClkDpmEnabledLevels;
70 uint8_t MClkDpmEnabledLevels;
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H A Dsmu72_discrete.h35 uint8_t Smio;
36 uint8_t padding;
52 uint8_t pcieDpmLevel;
53 uint8_t DeepSleepDivId;
62 uint8_t SclkDid;
63 uint8_t DisplayWatermark;
64 uint8_t EnabledForActivity;
65 uint8_t EnabledForThrottle;
66 uint8_t UpHyst;
67 uint8_t DownHyst;
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H A Dsmu9_driver_if.h84 uint8_t SsOn;
85 uint8_t Did; /* DID */
93 uint8_t a0_shift;
94 uint8_t a1_shift;
95 uint8_t a2_shift;
96 uint8_t padding;
104 uint8_t m1_shift;
105 uint8_t m2_shift;
106 uint8_t b_shift;
107 uint8_t padding;
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Dsmu7_fusion.h46 uint8_t DisplayPhy1Config;
47 uint8_t DisplayPhy2Config;
48 uint8_t DisplayPhy3Config;
49 uint8_t DisplayPhy4Config;
51 uint8_t DisplayPhy5Config;
52 uint8_t DisplayPhy6Config;
53 uint8_t DisplayPhy7Config;
54 uint8_t DisplayPhy8Config;
60 uint8_t SClkDpmEnabledLevels;
61 uint8_t MClkDpmEnabledLevels;
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H A Dsmu7_discrete.h55 uint8_t DisplayPhy1Config;
56 uint8_t DisplayPhy2Config;
57 uint8_t DisplayPhy3Config;
58 uint8_t DisplayPhy4Config;
60 uint8_t DisplayPhy5Config;
61 uint8_t DisplayPhy6Config;
62 uint8_t DisplayPhy7Config;
63 uint8_t DisplayPhy8Config;
69 uint8_t SClkDpmEnabledLevels;
70 uint8_t MClkDpmEnabledLevels;
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/OK3568_Linux_fs/kernel/drivers/scsi/
H A Dqla1280.h100 uint8_t flags; /* (1) Status flags. */
101 uint8_t dir; /* direction of transfer */
336 uint8_t id0; /* 0 */
337 uint8_t id1; /* 1 */
338 uint8_t id2; /* 2 */
339 uint8_t id3; /* 3 */
340 uint8_t version; /* 4 */
343 uint8_t bios_configuration_mode:2;
344 uint8_t bios_disable:1;
345 uint8_t selectable_scsi_boot_enable:1;
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H A Dips.h409 uint8_t op_code;
410 uint8_t command_id;
411 uint8_t log_drv;
412 uint8_t sg_count;
416 uint8_t segment_4G;
417 uint8_t enhanced_sg;
423 uint8_t op_code;
424 uint8_t command_id;
434 uint8_t op_code;
435 uint8_t command_id;
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/OK3568_Linux_fs/u-boot/arch/x86/include/asm/arch-baytrail/fsp/
H A Dfsp_vpd.h12 uint8_t enable_memory_down;
13 uint8_t dram_speed;
14 uint8_t dram_type;
15 uint8_t dimm_0_enable;
16 uint8_t dimm_1_enable;
17 uint8_t dimm_width;
18 uint8_t dimm_density;
19 uint8_t dimm_bus_width;
20 uint8_t dimm_sides; /* Ranks Per dimm_ */
21 uint8_t dimm_tcl; /* tCL */
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/OK3568_Linux_fs/u-boot/include/
H A Dddr_spd.h294 uint8_t info_size_crc; /* 0 # bytes */
295 uint8_t spd_rev; /* 1 Total # bytes of SPD */
296 uint8_t mem_type; /* 2 Key Byte / mem type */
297 uint8_t module_type; /* 3 Key Byte / Module Type */
298 uint8_t density_banks; /* 4 Density and Banks */
299 uint8_t addressing; /* 5 Addressing */
300 uint8_t package_type; /* 6 Package type */
301 uint8_t opt_feature; /* 7 Optional features */
302 uint8_t thermal_ref; /* 8 Thermal and refresh */
303 uint8_t oth_opt_features; /* 9 Other optional features */
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/OK3568_Linux_fs/kernel/include/scsi/
H A Discsi_proto.h77 uint8_t opcode;
78 uint8_t flags; /* Final bit */
79 uint8_t rsvd2[2];
80 uint8_t hlength; /* AHSs total length */
81 uint8_t dlength[3]; /* Data length */
88 uint8_t other[12];
129 uint8_t ahstype;
130 uint8_t ahspec[5];
139 uint8_t opcode;
140 uint8_t flags;
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/OK3568_Linux_fs/kernel/drivers/scsi/qla2xxx/
H A Dqla_fw.h53 uint8_t current_login_state;
54 uint8_t last_login_state;
64 uint8_t hard_address[3];
65 uint8_t reserved_1;
67 uint8_t port_id[3];
68 uint8_t sequence_id;
77 uint8_t prli_svc_param_word_0[2]; /* Big endian */
79 uint8_t prli_svc_param_word_3[2]; /* Big endian */
82 uint8_t port_name[WWN_SIZE];
83 uint8_t node_name[WWN_SIZE];
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H A Dqla_mr.h20 uint8_t entry_type; /* Entry type. */
21 uint8_t entry_count; /* Entry count. */
22 uint8_t sys_define; /* System defined. */
23 uint8_t entry_status; /* Entry Status. */
26 uint8_t reserved_0;
27 uint8_t port_path_ctrl;
34 uint8_t scsi_rsp_dsd_len;
35 uint8_t reserved_2;
39 uint8_t cntrl_flags;
41 uint8_t task_mgmt_flags; /* Task management flags. */
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomfwctrl.h47 uint8_t psi0_enable;
48 uint8_t psi1_enable;
49 uint8_t max_vid_step;
50 uint8_t telemetry_offset;
51 uint8_t telemetry_slope;
57 uint8_t uc_gpio_pin_bit_shift;
66 uint8_t ucPll_ss_enable;
67 uint8_t ucReserve;
96 uint8_t ucEnableGbVdroopTableCkson;
97 uint8_t ucEnableGbFuseTableCkson;
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