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Searched refs:spd_cb (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/
H A Dddr3_spd.c161 struct ddr3_spd_cb *spd_cb) in ddrtimingcalculation() argument
176 spd_cb->ddrspdclock = 2000000 / spd->t_ck; in ddrtimingcalculation()
177 clk_freq = spd_cb->ddrspdclock / 2; in ddrtimingcalculation()
194 spd_cb->ddrspdclock); in ddrtimingcalculation()
195 if (spd_cb->ddrspdclock == 1333) { in ddrtimingcalculation()
200 } else if (spd_cb->ddrspdclock == 1600) { in ddrtimingcalculation()
206 printf("Unsupported DDR3 speed %d\n", spd_cb->ddrspdclock); in ddrtimingcalculation()
297 spd_cb->ddr_size_gbyte = ddr3_get_size_in_mb(buf) / 1024; in ddrtimingcalculation()
302 static void init_ddr3param(struct ddr3_spd_cb *spd_cb, in init_ddr3param() argument
305 spd_cb->phy_cfg.pllcr = (spd->freqsel & 3) << 18 | 0xE << 13; in init_ddr3param()
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/OK3568_Linux_fs/u-boot/board/ti/ks2_evm/
H A Dddr3_k2hk.c21 struct ddr3_spd_cb spd_cb; in ddr3_init() local
23 if (ddr3_get_dimm_params_from_spd(&spd_cb)) { in ddr3_init()
30 printf("Detected SO-DIMM [%s]\n", spd_cb.dimm_name); in ddr3_init()
34 printf("DDR3 speed %d\n", spd_cb.ddrspdclock); in ddr3_init()
35 if (spd_cb.ddrspdclock == 1600) in ddr3_init()
46 spd_cb.phy_cfg.zq0cr1 |= 0x10000; in ddr3_init()
47 spd_cb.phy_cfg.zq1cr1 |= 0x10000; in ddr3_init()
48 spd_cb.phy_cfg.zq2cr1 |= 0x10000; in ddr3_init()
50 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg); in ddr3_init()
52 ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &spd_cb.emif_cfg); in ddr3_init()
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H A Dddr3_k2e.c19 struct ddr3_spd_cb spd_cb; in ddr3_init() local
21 if (ddr3_get_dimm_params_from_spd(&spd_cb)) { in ddr3_init()
28 printf("Detected SO-DIMM [%s]\n", spd_cb.dimm_name); in ddr3_init()
30 printf("DDR3 speed %d\n", spd_cb.ddrspdclock); in ddr3_init()
31 if (spd_cb.ddrspdclock == 1600) in ddr3_init()
39 spd_cb.phy_cfg.zq0cr1 |= 0x10000; in ddr3_init()
40 spd_cb.phy_cfg.zq1cr1 |= 0x10000; in ddr3_init()
41 spd_cb.phy_cfg.zq2cr1 |= 0x10000; in ddr3_init()
42 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg); in ddr3_init()
43 ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &spd_cb.emif_cfg); in ddr3_init()
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H A Dddr3_cfg.h18 int ddr3_get_dimm_params_from_spd(struct ddr3_spd_cb *spd_cb);