Searched refs:smc_state (Results 1 – 7 of 7) sorted by relevance
2295 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_smc_sp() argument2302 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in ni_populate_smc_sp()2304 smc_state->levels[ps->performance_level_count - 1].bSP = in ni_populate_smc_sp()2391 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_smc_t() argument2406 smc_state->levels[0].aT = cpu_to_be32(a_t); in ni_populate_smc_t()2410 smc_state->levels[0].aT = cpu_to_be32(0); in ni_populate_smc_t()2435 a_t = be32_to_cpu(smc_state->levels[i].aT) & ~CG_R_MASK; in ni_populate_smc_t()2437 smc_state->levels[i].aT = cpu_to_be32(a_t); in ni_populate_smc_t()2443 smc_state->levels[i + 1].aT = cpu_to_be32(a_t); in ni_populate_smc_t()2451 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_power_containment_values() argument[all …]
2271 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_power_containment_values() argument2294 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2299 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()2300 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()2301 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()2302 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()2303 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()2353 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()2354 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()2355 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; in si_populate_power_containment_values()[all …]
257 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_t() argument289 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()295 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()303 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_sp() argument309 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()311 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()675 RV770_SMC_SWSTATE *smc_state) in rv770_convert_power_state_to_smc() argument681 smc_state->flags |= PPSMC_SWSTATE_FLAG_DC; in rv770_convert_power_state_to_smc()685 &smc_state->levels[0], in rv770_convert_power_state_to_smc()692 &smc_state->levels[1], in rv770_convert_power_state_to_smc()[all …]
765 RV770_SMC_SWSTATE *smc_state) in cypress_convert_power_state_to_smc() argument772 smc_state->flags |= PPSMC_SWSTATE_FLAG_DC; in cypress_convert_power_state_to_smc()776 &smc_state->levels[0], in cypress_convert_power_state_to_smc()783 &smc_state->levels[1], in cypress_convert_power_state_to_smc()790 &smc_state->levels[2], in cypress_convert_power_state_to_smc()795 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()796 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()797 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()800 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()801 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc()[all …]
231 RV770_SMC_SWSTATE *smc_state);234 RV770_SMC_SWSTATE *smc_state);
2367 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_power_containment_values() argument2390 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2395 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()2396 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()2397 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()2398 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()2399 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()2448 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()2449 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()2450 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; in si_populate_power_containment_values()[all …]
42 enum smc_state { /* possible states of an SMC socket */ enum