Searched refs:sdramclk_ctrl (Results 1 – 3 of 3) sorted by relevance
110 if (readl(&clk->sdramclk_ctrl) & CLK_SDRAM_DDR_SEL) { in get_sdram_clk_rate()
40 writel(dram->cmddelay, &clk->sdramclk_ctrl); in ddr_init()
42 u32 sdramclk_ctrl; /* SDRAM Clock Control Register */ member