Searched refs:rl_val (Results 1 – 2 of 2) sorted by relevance
112 dram_info->rl_val[cs][pup][P] = phase; in ddr3_read_leveling_hw()117 dram_info->rl_val[cs][pup][D] = delay; in ddr3_read_leveling_hw()118 dram_info->rl_val[cs][pup][S] = in ddr3_read_leveling_hw()123 dram_info->rl_val[cs][pup][DQS] = in ddr3_read_leveling_hw()141 rl_val[cs][pup][P], 1); in ddr3_read_leveling_hw()144 rl_val[cs][pup][D], 2); in ddr3_read_leveling_hw()272 DEBUG_RL_D((u32) dram_info->rl_val[cs][pup][P], 1); in ddr3_read_leveling_sw()274 DEBUG_RL_D((u32) dram_info->rl_val[cs][pup][D], 2); in ddr3_read_leveling_sw()291 phase = dram_info->rl_val[cs][pup][P]; in ddr3_read_leveling_sw()292 delay = dram_info->rl_val[cs][pup][D]; in ddr3_read_leveling_sw()[all …]
261 u32 rl_val[MAX_CS][MAX_PUP_NUM][7]; member