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Searched refs:reg_cfg (Results 1 – 25 of 46) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/dsi/
H A Ddsi_cfg.c14 .reg_cfg = {
34 .reg_cfg = {
55 .reg_cfg = {
75 .reg_cfg = {
91 .reg_cfg = {
119 .reg_cfg = {
139 .reg_cfg = {
158 .reg_cfg = {
180 .reg_cfg = {
194 .reg_cfg = {
H A Ddsi_cfg.h34 struct dsi_reg_config reg_cfg; member
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/halmac/halmac_88xx/
H A Dhalmac_sdio_88xx.c478 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in r_indir_cmd52_88xx() local
482 status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg); in r_indir_cmd52_88xx()
489 PLTFM_SDIO_CMD52_W(reg_cfg, (u8)offset); in r_indir_cmd52_88xx()
490 PLTFM_SDIO_CMD52_W(reg_cfg + 1, (u8)(offset >> 8)); in r_indir_cmd52_88xx()
491 PLTFM_SDIO_CMD52_W(reg_cfg + 2, (u8)(BIT(3) | BIT(4))); in r_indir_cmd52_88xx()
494 tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2); in r_indir_cmd52_88xx()
512 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in r_indir_cmd53_88xx() local
521 status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg); in r_indir_cmd53_88xx()
528 PLTFM_SDIO_CMD53_W32(reg_cfg, offset | BIT(19) | BIT(20)); in r_indir_cmd53_88xx()
531 PLTFM_SDIO_CMD53_RN(reg_cfg + 2, sizeof(value), value); in r_indir_cmd53_88xx()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/halmac/halmac_88xx/
H A Dhalmac_sdio_88xx.c479 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in r_indir_cmd52_88xx() local
483 status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg); in r_indir_cmd52_88xx()
490 PLTFM_SDIO_CMD52_W(reg_cfg, (u8)offset); in r_indir_cmd52_88xx()
491 PLTFM_SDIO_CMD52_W(reg_cfg + 1, (u8)(offset >> 8)); in r_indir_cmd52_88xx()
492 PLTFM_SDIO_CMD52_W(reg_cfg + 2, (u8)(BIT(3) | BIT(4))); in r_indir_cmd52_88xx()
495 tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2); in r_indir_cmd52_88xx()
513 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in r_indir_cmd53_88xx() local
522 status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg); in r_indir_cmd53_88xx()
529 PLTFM_SDIO_CMD53_W32(reg_cfg, offset | BIT(19) | BIT(20)); in r_indir_cmd53_88xx()
532 PLTFM_SDIO_CMD53_RN(reg_cfg + 2, sizeof(value), value); in r_indir_cmd53_88xx()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/halmac/halmac_88xx/
H A Dhalmac_sdio_88xx.c478 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in r_indir_cmd52_88xx() local
482 status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg); in r_indir_cmd52_88xx()
489 PLTFM_SDIO_CMD52_W(reg_cfg, (u8)offset); in r_indir_cmd52_88xx()
490 PLTFM_SDIO_CMD52_W(reg_cfg + 1, (u8)(offset >> 8)); in r_indir_cmd52_88xx()
491 PLTFM_SDIO_CMD52_W(reg_cfg + 2, (u8)(BIT(3) | BIT(4))); in r_indir_cmd52_88xx()
494 tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2); in r_indir_cmd52_88xx()
512 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in r_indir_cmd53_88xx() local
521 status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg); in r_indir_cmd53_88xx()
528 PLTFM_SDIO_CMD53_W32(reg_cfg, offset | BIT(19) | BIT(20)); in r_indir_cmd53_88xx()
531 PLTFM_SDIO_CMD53_RN(reg_cfg + 2, sizeof(value), value); in r_indir_cmd53_88xx()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/halmac/halmac_88xx/
H A Dhalmac_sdio_88xx.c478 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in r_indir_cmd52_88xx() local
482 status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg); in r_indir_cmd52_88xx()
489 PLTFM_SDIO_CMD52_W(reg_cfg, (u8)offset); in r_indir_cmd52_88xx()
490 PLTFM_SDIO_CMD52_W(reg_cfg + 1, (u8)(offset >> 8)); in r_indir_cmd52_88xx()
491 PLTFM_SDIO_CMD52_W(reg_cfg + 2, (u8)(BIT(3) | BIT(4))); in r_indir_cmd52_88xx()
494 tmp = PLTFM_SDIO_CMD52_R(reg_cfg + 2); in r_indir_cmd52_88xx()
512 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in r_indir_cmd53_88xx() local
521 status = cnv_to_sdio_bus_offset_88xx(adapter, &reg_cfg); in r_indir_cmd53_88xx()
528 PLTFM_SDIO_CMD53_W32(reg_cfg, offset | BIT(19) | BIT(20)); in r_indir_cmd53_88xx()
531 PLTFM_SDIO_CMD53_RN(reg_cfg + 2, sizeof(value), value); in r_indir_cmd53_88xx()
[all …]
/OK3568_Linux_fs/kernel/drivers/dma/
H A Dste_dma40_ll.c136 u32 reg_cfg, in d40_phy_fill_lli() argument
171 lli->reg_cfg = reg_cfg; in d40_phy_fill_lli()
181 lli->reg_cfg |= BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
183 lli->reg_cfg &= ~BIT(D40_SREG_CFG_TIM_POS); in d40_phy_fill_lli()
213 dma_addr_t lli_phys, dma_addr_t first_phys, u32 reg_cfg, in d40_phy_buf_to_lli() argument
249 reg_cfg, info, flags); in d40_phy_buf_to_lli()
270 u32 reg_cfg, in d40_phy_sg_to_lli() argument
298 reg_cfg, info, otherinfo, flags); in d40_phy_sg_to_lli()
363 u32 reg_cfg, in d40_log_fill_lli() argument
369 lli->lcsp13 = reg_cfg; in d40_log_fill_lli()
H A Dste_dma40_ll.h345 u32 reg_cfg; member
446 u32 reg_cfg,
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/
H A Dlontium-lt9611.c115 const struct reg_sequence reg_cfg[] = { in lt9611_mipi_input_analog() local
127 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_analog()
133 struct reg_sequence reg_cfg[] = { in lt9611_mipi_input_digital() local
143 reg_cfg[1].def = 0x03; in lt9611_mipi_input_digital()
145 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_digital()
194 const struct reg_sequence reg_cfg[] = { in lt9611_pcr_setup() local
227 regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_pcr_setup()
249 const struct reg_sequence reg_cfg[] = { in lt9611_pll_setup() local
262 regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_pll_setup()
366 struct reg_sequence reg_cfg[] = { in lt9611_hdmi_tx_phy() local
[all …]
/OK3568_Linux_fs/kernel/drivers/ata/
H A Dpata_octeon_cf.c90 union cvmx_mio_boot_reg_cfgx reg_cfg; in octeon_cf_set_boot_reg_cfg() local
108 reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs)); in octeon_cf_set_boot_reg_cfg()
109 reg_cfg.s.dmack = 0; /* Don't assert DMACK on access */ in octeon_cf_set_boot_reg_cfg()
110 reg_cfg.s.tim_mult = tim_mult; /* Timing mutiplier */ in octeon_cf_set_boot_reg_cfg()
111 reg_cfg.s.rd_dly = 0; /* Sample on falling edge of BOOT_OE */ in octeon_cf_set_boot_reg_cfg()
112 reg_cfg.s.sam = 0; /* Don't combine write and output enable */ in octeon_cf_set_boot_reg_cfg()
113 reg_cfg.s.we_ext = 0; /* No write enable extension */ in octeon_cf_set_boot_reg_cfg()
114 reg_cfg.s.oe_ext = 0; /* No read enable extension */ in octeon_cf_set_boot_reg_cfg()
115 reg_cfg.s.en = 1; /* Enable this region */ in octeon_cf_set_boot_reg_cfg()
116 reg_cfg.s.orbit = 0; /* Don't combine with previous region */ in octeon_cf_set_boot_reg_cfg()
[all …]
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/jpege/
H A Dhal_jpege_vepu2_v2.c47 MppDevRegOffCfgs *reg_cfg; member
130 if (ctx_ext->reg_cfg) { in hal_jpege_vepu2_deinit()
131 mpp_dev_multi_offset_deinit(ctx_ext->reg_cfg); in hal_jpege_vepu2_deinit()
132 ctx_ext->reg_cfg = NULL; in hal_jpege_vepu2_deinit()
323 if (!ctx_ext->reg_cfg) in hal_jpege_vepu2_get_task()
324 mpp_dev_multi_offset_init(&ctx_ext->reg_cfg, 24); in hal_jpege_vepu2_get_task()
593 MppDevRegOffCfgs *reg_cfg = ctx_ext->reg_cfg; in multi_core_start() local
628 mpp_dev_multi_offset_reset(reg_cfg); in multi_core_start()
693 mpp_dev_multi_offset_update(reg_cfg, VEPU2_REG_INPUT_Y, cfg.offset_byte[0]); in multi_core_start()
694 mpp_dev_multi_offset_update(reg_cfg, VEPU2_REG_INPUT_U, cfg.offset_byte[1]); in multi_core_start()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/halmac/
H A Dhalmac_api.c590 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in pltfm_reg_r_indir_sdio() local
594 status = cnv_to_sdio_bus_offset(&reg_cfg); in pltfm_reg_r_indir_sdio()
601 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg, (u8)offset); in pltfm_reg_r_indir_sdio()
602 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg + 1, in pltfm_reg_r_indir_sdio()
604 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg + 2, in pltfm_reg_r_indir_sdio()
608 tmp = pltfm_api->SDIO_CMD52_READ(drv_adapter, reg_cfg + 2); in pltfm_reg_r_indir_sdio()
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/halmac/
H A Dhalmac_api.c590 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in pltfm_reg_r_indir_sdio() local
594 status = cnv_to_sdio_bus_offset(&reg_cfg); in pltfm_reg_r_indir_sdio()
601 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg, (u8)offset); in pltfm_reg_r_indir_sdio()
602 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg + 1, in pltfm_reg_r_indir_sdio()
604 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg + 2, in pltfm_reg_r_indir_sdio()
608 tmp = pltfm_api->SDIO_CMD52_READ(drv_adapter, reg_cfg + 2); in pltfm_reg_r_indir_sdio()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/halmac/
H A Dhalmac_api.c589 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in pltfm_reg_r_indir_sdio() local
593 status = cnv_to_sdio_bus_offset(&reg_cfg); in pltfm_reg_r_indir_sdio()
600 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg, (u8)offset); in pltfm_reg_r_indir_sdio()
601 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg + 1, in pltfm_reg_r_indir_sdio()
603 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg + 2, in pltfm_reg_r_indir_sdio()
607 tmp = pltfm_api->SDIO_CMD52_READ(drv_adapter, reg_cfg + 2); in pltfm_reg_r_indir_sdio()
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/halmac/
H A Dhalmac_api.c589 u32 reg_cfg = REG_SDIO_INDIRECT_REG_CFG; in pltfm_reg_r_indir_sdio() local
593 status = cnv_to_sdio_bus_offset(&reg_cfg); in pltfm_reg_r_indir_sdio()
600 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg, (u8)offset); in pltfm_reg_r_indir_sdio()
601 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg + 1, in pltfm_reg_r_indir_sdio()
603 pltfm_api->SDIO_CMD52_WRITE(drv_adapter, reg_cfg + 2, in pltfm_reg_r_indir_sdio()
607 tmp = pltfm_api->SDIO_CMD52_READ(drv_adapter, reg_cfg + 2); in pltfm_reg_r_indir_sdio()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_28nm.c156 .reg_cfg = {
174 .reg_cfg = {
192 .reg_cfg = {
H A Ddsi_phy_14nm.c150 .reg_cfg = {
168 .reg_cfg = {
H A Ddsi_phy_10nm.c215 .reg_cfg = {
233 .reg_cfg = {
H A Ddsi_phy_7nm.c224 .reg_cfg = {
242 .reg_cfg = {
H A Ddsi_phy.c483 const struct dsi_reg_entry *regs = phy->cfg->reg_cfg.regs; in dsi_phy_regulator_init()
485 int num = phy->cfg->reg_cfg.num; in dsi_phy_regulator_init()
508 const struct dsi_reg_entry *regs = phy->cfg->reg_cfg.regs; in dsi_phy_regulator_disable()
509 int num = phy->cfg->reg_cfg.num; in dsi_phy_regulator_disable()
523 const struct dsi_reg_entry *regs = phy->cfg->reg_cfg.regs; in dsi_phy_regulator_enable()
525 int num = phy->cfg->reg_cfg.num; in dsi_phy_regulator_enable()
H A Ddsi_phy.h28 struct dsi_reg_config reg_cfg; member
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu580.c103 MppDevRegOffCfgs *reg_cfg; member
1429 if (ctx->reg_cfg) { in hal_h265e_v580_deinit()
1430 mpp_dev_multi_offset_deinit(ctx->reg_cfg); in hal_h265e_v580_deinit()
1431 ctx->reg_cfg = NULL; in hal_h265e_v580_deinit()
1479 mpp_dev_multi_offset_init(&ctx->reg_cfg, 24); in hal_h265e_v580_init()
1480 ctx->osd_cfg.reg_cfg = ctx->reg_cfg; in hal_h265e_v580_init()
2320 mpp_dev_multi_offset_update(ctx->reg_cfg, 164, ctx->fbc_header_len); in vepu580_h265_set_hw_address()
2329 mpp_dev_multi_offset_update(ctx->reg_cfg, 166, ctx->fbc_header_len); in vepu580_h265_set_hw_address()
2377 mpp_dev_multi_offset_update(ctx->reg_cfg, 175, mpp_packet_get_length(task->packet)); in vepu580_h265_set_hw_address()
2378 mpp_dev_multi_offset_update(ctx->reg_cfg, 172, mpp_buffer_get_size(enc_task->output)); in vepu580_h265_set_hw_address()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-omap1/include/mach/
H A Dmux.h432 extern int omap_cfg_reg(unsigned long reg_cfg);
436 static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } in omap_cfg_reg() argument
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/common/
H A Dvepu541_common.h154 MppDevRegOffCfgs *reg_cfg; member
H A Dvepu541_common.c1010 MppDevRegOffCfgs *reg_cfg = cfg->reg_cfg; in vepu580_set_osd() local
1072 if (reg_cfg) in vepu580_set_osd()
1073 … mpp_dev_multi_offset_update(reg_cfg, VEPU580_OSD_ADDR_IDX_BASE + k, tmp->buf_offset); in vepu580_set_osd()

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