Searched refs:mem_dq_per_write_dqs (Results 1 – 3 of 3) sorted by relevance
144 param->write_correct_mask = (1 << rwcfg->mem_dq_per_write_dqs) - 1; in phy_mgr_initialize()313 scc_mgr_set(SCC_MGR_IO_IN_DELAY_OFFSET, rwcfg->mem_dq_per_write_dqs, in scc_mgr_set_dqs_io_in_delay()320 rwcfg->mem_dq_per_write_dqs + 1 + dm, in scc_mgr_set_dm_in_delay()331 scc_mgr_set(SCC_MGR_IO_OUT1_DELAY_OFFSET, rwcfg->mem_dq_per_write_dqs, in scc_mgr_set_dqs_out1_delay()338 rwcfg->mem_dq_per_write_dqs + 1 + dm, in scc_mgr_set_dm_out1_delay()584 for (i = 0; i < rwcfg->mem_dq_per_write_dqs; i++) { in scc_mgr_zero_group()644 for (i = 0; i < rwcfg->mem_dq_per_write_dqs; i++) { in scc_mgr_apply_group_dq_out1_delay()686 for (i = 0; i < rwcfg->mem_dq_per_write_dqs; i++) in scc_mgr_apply_group_all_out_delay_add()1179 const u32 shift_ratio = rwcfg->mem_dq_per_write_dqs / in rw_mgr_mem_calibrate_write_test()1986 const u32 per_dqs = write ? rwcfg->mem_dq_per_write_dqs : in search_stop_check()[all …]
244 .mem_dq_per_write_dqs = RW_MGR_MEM_DQ_PER_WRITE_DQS,
178 u8 mem_dq_per_write_dqs; member