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Searched refs:mbar2_writeLong (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/m68k/cpu/mcf52x2/
H A Dcpu_init.c206 mbar2_writeLong(MCFSIM_GPIO_INT_EN, 0x00000080); in cpu_init_f()
677 mbar2_writeLong(MCFSIM_GPIO_FUNC, CONFIG_SYS_GPIO_FUNC); in cpu_init_f()
678 mbar2_writeLong(MCFSIM_GPIO1_FUNC, CONFIG_SYS_GPIO1_FUNC); in cpu_init_f()
679 mbar2_writeLong(MCFSIM_GPIO_EN, CONFIG_SYS_GPIO_EN); in cpu_init_f()
680 mbar2_writeLong(MCFSIM_GPIO1_EN, CONFIG_SYS_GPIO1_EN); in cpu_init_f()
681 mbar2_writeLong(MCFSIM_GPIO_OUT, CONFIG_SYS_GPIO_OUT); in cpu_init_f()
682 mbar2_writeLong(MCFSIM_GPIO1_OUT, CONFIG_SYS_GPIO1_OUT); in cpu_init_f()
708 mbar2_writeLong(MCFSIM_GPIO_INT_EN, 0x00000080); in cpu_init_f()
711 mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); /* Enable a 1 cycle pre-drive cycle on CS1 */ in cpu_init_f()
717 mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); in cpu_init_f()
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H A Dspeed.c48 mbar2_writeLong(MCFSIM_PLLCR, cpll); /* Set the PLL to bypass mode (PSTCLK = crystal) */ in get_clocks()
49 mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* set the clock speed */ in get_clocks()
51 mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */ in get_clocks()
/OK3568_Linux_fs/u-boot/board/freescale/m5249evb/
H A Dm5249evb.c28 mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */ in checkboard()
/OK3568_Linux_fs/u-boot/board/freescale/m5253evbe/
H A Dm5253evbe.c108 mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND); in ide_set_reset()
/OK3568_Linux_fs/u-boot/arch/m68k/include/asm/
H A Dm5249.h23 #define mbar2_writeLong(x,y) *((volatile unsigned long *) (CONFIG_SYS_MBAR2 + x)) = y macro
/OK3568_Linux_fs/u-boot/board/freescale/m5253demo/
H A Dm5253demo.c115 mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND); in ide_set_reset()