Searched refs:m_RGA2_ALPHA_CTRL1_SW_DST_BLEND_M1 (Results 1 – 3 of 3) sorted by relevance
204 #define m_RGA2_ALPHA_CTRL1_SW_DST_BLEND_M1 ( 0x3<<24) macro
755 …reg1 = ((reg1 & (~m_RGA2_ALPHA_CTRL1_SW_DST_BLEND_M1)) | (s_RGA2_ALPHA_CTRL1_SW_DST_BLEND_M1(msg->… in RGA2_set_reg_alpha_info()
378 #define m_RGA2_ALPHA_CTRL1_SW_DST_BLEND_M1 (0x3 << 24) macro