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Searched refs:lcdc_div (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3288.c478 u32 lcdc_div, parent; in rockchip_vop_set_clk() local
491 ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div); in rockchip_vop_set_clk()
512 lcdc_div = DIV_ROUND_UP(gpll_rate, in rockchip_vop_set_clk()
516 lcdc_div = DIV_ROUND_UP(npll_rate, in rockchip_vop_set_clk()
521 ((lcdc_div - 1) << DCLK_VOP0_DIV_SHIFT) | in rockchip_vop_set_clk()
528 ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div); in rockchip_vop_set_clk()
550 lcdc_div = DIV_ROUND_UP(gpll_rate, in rockchip_vop_set_clk()
554 lcdc_div = DIV_ROUND_UP(npll_rate, in rockchip_vop_set_clk()
559 ((lcdc_div - 1) << DCLK_VOP1_DIV_SHIFT) | in rockchip_vop_set_clk()
563 lcdc_div = DIV_ROUND_UP(gpll_rate, rate_hz); in rockchip_vop_set_clk()
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H A Dclk_rk3368.c771 u32 lcdc_div; in rk3368_vop_set_clk() local
778 lcdc_div = NPLL_HZ / hz; in rk3368_vop_set_clk()
780 ret = pll_para_config(hz, &npll_config, &lcdc_div); in rk3368_vop_set_clk()
791 (lcdc_div - 1) << DCLK_VOP_DIV_SHIFT); in rk3368_vop_set_clk()
795 lcdc_div = rkclk_pll_get_rate(cru, CPLL) / hz; in rk3368_vop_set_clk()
803 (lcdc_div - 1) << in rk3368_vop_set_clk()
806 lcdc_div = rkclk_pll_get_rate(cru, GPLL) / hz; in rk3368_vop_set_clk()
814 (lcdc_div - 1) << in rk3368_vop_set_clk()