Lines Matching refs:lcdc_div
478 u32 lcdc_div, parent; in rockchip_vop_set_clk() local
491 ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div); in rockchip_vop_set_clk()
512 lcdc_div = DIV_ROUND_UP(gpll_rate, in rockchip_vop_set_clk()
516 lcdc_div = DIV_ROUND_UP(npll_rate, in rockchip_vop_set_clk()
521 ((lcdc_div - 1) << DCLK_VOP0_DIV_SHIFT) | in rockchip_vop_set_clk()
528 ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div); in rockchip_vop_set_clk()
550 lcdc_div = DIV_ROUND_UP(gpll_rate, in rockchip_vop_set_clk()
554 lcdc_div = DIV_ROUND_UP(npll_rate, in rockchip_vop_set_clk()
559 ((lcdc_div - 1) << DCLK_VOP1_DIV_SHIFT) | in rockchip_vop_set_clk()
563 lcdc_div = DIV_ROUND_UP(gpll_rate, rate_hz); in rockchip_vop_set_clk()
567 (lcdc_div - 1) << ACLK_VIO0_DIV_SHIFT); in rockchip_vop_set_clk()
570 lcdc_div = DIV_ROUND_UP(gpll_rate, rate_hz); in rockchip_vop_set_clk()
574 (lcdc_div - 1) << ACLK_VIO1_DIV_SHIFT); in rockchip_vop_set_clk()
576 lcdc_div = DIV_ROUND_UP(rate_hz, HCLK_VIO_HZ); in rockchip_vop_set_clk()
579 (lcdc_div - 1) << HCLK_VIO_DIV_SHIFT); in rockchip_vop_set_clk()