Searched refs:hclk_div (Results 1 – 7 of 7) sorted by relevance
389 u32 aclk_div, hclk_div, pclk_div, h2p_div; in rkclk_init() local422 hclk_div = ilog2(CPU_ACLK_HZ / CPU_HCLK_HZ); in rkclk_init()423 assert((1 << hclk_div) * CPU_HCLK_HZ <= CPU_ACLK_HZ && hclk_div < 0x3); in rkclk_init()435 hclk_div << CPU_HCLK_DIV_SHIFT); in rkclk_init()444 hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ); in rkclk_init()445 assert((1 << hclk_div) * PERI_HCLK_HZ <= in rkclk_init()446 PERI_ACLK_HZ && (hclk_div < 0x4)); in rkclk_init()458 hclk_div << PERI_HCLK_DIV_SHIFT | in rkclk_init()
419 u32 aclk_div, hclk_div, pclk_div, h2p_div; in rkclk_init() local452 hclk_div = ilog2(CPU_ACLK_HZ / CPU_HCLK_HZ); in rkclk_init()453 assert((1 << hclk_div) * CPU_HCLK_HZ <= CPU_ACLK_HZ && hclk_div < 0x3); in rkclk_init()465 hclk_div << CPU_HCLK_DIV_SHIFT); in rkclk_init()474 hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ); in rkclk_init()475 assert((1 << hclk_div) * PERI_HCLK_HZ <= in rkclk_init()476 PERI_ACLK_HZ && (hclk_div < 0x4)); in rkclk_init()488 hclk_div << PERI_HCLK_DIV_SHIFT | in rkclk_init()
105 u32 hclk_div; in rkclk_init() local150 hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1; in rkclk_init()151 assert((hclk_div + 1) * BUS_HCLK_HZ <= BUS_ACLK_HZ && hclk_div <= 0x3); in rkclk_init()161 hclk_div << BUS_HCLK_DIV_SHIFT); in rkclk_init()170 hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ); in rkclk_init()171 assert((1 << hclk_div) * PERI_HCLK_HZ <= in rkclk_init()172 PERI_ACLK_HZ && (hclk_div < 0x4)); in rkclk_init()183 hclk_div << PERI_HCLK_DIV_SHIFT | in rkclk_init()
1401 u32 hclk_div; in rkclk_init() local1425 hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1; in rkclk_init()1426 assert((hclk_div + 1) * PERIHP_HCLK_HZ <= in rkclk_init()1427 PERIHP_ACLK_HZ && (hclk_div <= 0x3)); in rkclk_init()1437 hclk_div << HCLK_PERIHP_DIV_CON_SHIFT | in rkclk_init()1444 hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1; in rkclk_init()1445 assert((hclk_div + 1) * PERILP0_HCLK_HZ <= in rkclk_init()1446 PERILP0_ACLK_HZ && (hclk_div <= 0x3)); in rkclk_init()1456 hclk_div << HCLK_PERILP0_DIV_CON_SHIFT | in rkclk_init()1461 hclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP1_HCLK_HZ) - 1; in rkclk_init()[all …]
590 u32 hclk_div; in rkclk_init() local615 hclk_div = PD_BUS_ACLK_HZ / PD_BUS_HCLK_HZ - 1; in rkclk_init()616 assert((hclk_div + 1) * PD_BUS_HCLK_HZ <= in rkclk_init()617 PD_BUS_ACLK_HZ && (hclk_div <= 0x3) && (hclk_div != 0x2)); in rkclk_init()627 hclk_div << PD_BUS_HCLK_DIV_SHIFT | in rkclk_init()638 hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ); in rkclk_init()639 assert((1 << hclk_div) * PERI_HCLK_HZ <= in rkclk_init()640 PERI_ACLK_HZ && (hclk_div <= 0x2)); in rkclk_init()651 hclk_div << PERI_HCLK_DIV_SHIFT | in rkclk_init()
62 const uint8_t hclk_div = in get_HCLK() local64 const ulong hclk_rate = get_PLLCLK(&syscon->clkset1) / hclk_div; in get_HCLK()
728 u32 val, hclk_div; in clk_ddram_enable() local731 hclk_div = val & clk->busy_mask; in clk_ddram_enable()738 if (hclk_div == 0x0 || hclk_div == (BIT(1) | BIT(0))) in clk_ddram_enable()742 clk->enable_mask, hclk_div << 7); in clk_ddram_enable()