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Searched refs:has_bwadj (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3188.c106 const struct pll_div *div, bool has_bwadj) in rkclk_set_pll() argument
128 if (has_bwadj) in rkclk_set_pll()
140 unsigned int hz, bool has_bwadj) in rkclk_configure_ddr() argument
172 rkclk_set_pll(cru, CLK_DDR, &dpll_cfg[cfg], has_bwadj); in rkclk_configure_ddr()
186 unsigned int hz, bool has_bwadj) in rkclk_configure_cpu() argument
221 rkclk_set_pll(cru, CLK_ARM, &apll_cfg[cfg], has_bwadj); in rkclk_configure_cpu()
417 bool has_bwadj) in rkclk_init() argument
429 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg, has_bwadj); in rkclk_init()
430 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg, has_bwadj); in rkclk_init()
550 priv->has_bwadj); in rk3188_clk_set_rate()
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H A Dclk_rk3066.c108 const struct pll_div *div, bool has_bwadj) in rkclk_set_pll() argument
130 if (has_bwadj) in rkclk_set_pll()
142 unsigned int hz, bool has_bwadj) in rkclk_configure_ddr() argument
174 rkclk_set_pll(cru, CLK_DDR, &dpll_cfg[cfg], has_bwadj); in rkclk_configure_ddr()
188 unsigned int hz, bool has_bwadj) in rkclk_configure_cpu() argument
223 rkclk_set_pll(cru, CLK_ARM, &apll_cfg[cfg], has_bwadj); in rkclk_configure_cpu()
387 bool has_bwadj) in rkclk_init() argument
399 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg, has_bwadj); in rkclk_init()
400 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg, has_bwadj); in rkclk_init()
515 priv->has_bwadj); in rk3066_clk_set_rate()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3188.h31 bool has_bwadj; member
H A Dcru_rk3066.h31 bool has_bwadj; member