Searched refs:cwl (Results 1 – 9 of 9) sorted by relevance
| /OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_spd.c | 577 u32 reg, tmp, cwl; local 1090 cwl = 5; /* CWL = 5 */ 1092 cwl = 6; /* CWL = 6 */ 1094 cwl = 7; /* CWL = 7 */ 1096 cwl = 8; /* CWL = 8 */ 1098 cwl = 9; /* CWL = 9 */ 1100 cwl = 10; /* CWL = 10 */ 1102 cwl = 11; /* CWL = 11 */ 1104 cwl = 12; /* CWL = 12 */ 1106 cwl = 12; /* CWL = 12 */ [all …]
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| H A D | ddr3_dfs.c | 999 reg |= (((dram_info->cwl) & REG_DFS_CWL_NEXT_STATE_MASK) << in ddr3_dfs_low_2_high() 1185 reg |= ((dram_info->cwl) << REG_DDR3_MR2_CWL_OFFS); in ddr3_dfs_low_2_high() 1497 reg |= dram_info->cwl << REG_DDR3_MR2_CWL_OFFS; in ddr3_dfs_low_2_high()
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| H A D | ddr3_hw_training.h | 269 u32 cwl; member
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| H A D | ddr3_hw_training.c | 146 dram_info.cwl = reg; in ddr3_hw_training()
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 123 u32 cwl; member 254 spd->cwl = 0; in ddrtimingcalculation() 256 spd->cwl = 1; in ddrtimingcalculation() 258 spd->cwl = 2; in ddrtimingcalculation() 260 spd->cwl = 3; in ddrtimingcalculation() 262 spd->cwl = 4; in ddrtimingcalculation() 264 spd->cwl = 5; in ddrtimingcalculation() 357 (spd->cwl & 7) << 3 | (spd->pasr & 7); in init_ddr3param() 371 (DYN_ODT & 3) << 22 | (spd->cwl & 0x7) << 14 | in init_ddr3param()
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| /OK3568_Linux_fs/u-boot/drivers/ddr/fsl/ |
| H A D | ctrl_regs.c | 86 unsigned int cwl; in compute_cas_write_latency() local 89 cwl = 9; in compute_cas_write_latency() 91 cwl = 10; in compute_cas_write_latency() 93 cwl = 11; in compute_cas_write_latency() 95 cwl = 12; in compute_cas_write_latency() 97 cwl = 14; in compute_cas_write_latency() 99 cwl = 16; in compute_cas_write_latency() 101 cwl = 18; in compute_cas_write_latency() 103 return cwl; in compute_cas_write_latency() 120 unsigned int cwl; in compute_cas_write_latency() local [all …]
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| /OK3568_Linux_fs/u-boot/arch/x86/cpu/quark/ |
| H A D | smc.c | 268 uint8_t cwl; in ddrphy_init() local 273 cwl = 5 + mrc_params->ddr_speed; in ddrphy_init() 436 ((cwl - 2) << 0), 0x003f1f1f); in ddrphy_init() 442 ((cwl - 2) << 0), 0x003f1f1f); in ddrphy_init()
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| /OK3568_Linux_fs/u-boot/drivers/ram/rockchip/ |
| H A D | sdram_rv1126.c | 1817 u32 mr_tmp, cl, cwl, phy_fsp, offset = 0; in data_training_wr() local 1823 cwl = readl(PHY_REG(phy_base, offset + 2)); in data_training_wr() 1911 clrsetbits_le32(PHY_REG(phy_base, offset + 2), 0x1f, cwl); in data_training_wr()
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| /OK3568_Linux_fs/kernel/arch/mips/include/asm/octeon/ |
| H A D | cvmx-lmcx-defs.h | 1892 uint64_t cwl:3; member 1894 uint64_t cwl:3;
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