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Searched refs:clidr (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/kernel/arch/arm64/include/asm/
H A Dcache.h40 #define CLIDR_LOUU(clidr) (((clidr) >> CLIDR_LOUU_SHIFT) & 0x7) argument
41 #define CLIDR_LOC(clidr) (((clidr) >> CLIDR_LOC_SHIFT) & 0x7) argument
42 #define CLIDR_LOUIS(clidr) (((clidr) >> CLIDR_LOUIS_SHIFT) & 0x7) argument
124 u64 clidr = read_sysreg(clidr_el1); in read_cpuid_effective_cachetype() local
126 if (CLIDR_LOC(clidr) == 0 || in read_cpuid_effective_cachetype()
127 (CLIDR_LOUIS(clidr) == 0 && CLIDR_LOUU(clidr) == 0)) in read_cpuid_effective_cachetype()
/OK3568_Linux_fs/kernel/arch/arm64/kernel/
H A Dcacheinfo.c17 #define CLIDR_CTYPE(clidr, level) \ argument
18 (((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))
31 u64 clidr; in get_cache_type() local
35 clidr = read_sysreg(clidr_el1); in get_cache_type()
36 return CLIDR_CTYPE(clidr, level); in get_cache_type()
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv7/
H A Dcache_v7_asm.S29 mrc p15, 1, r0, c0, c0, 1 @ read clidr
31 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr
37 mov r1, r0, lsr r2 @ extract cache type bits from clidr
100 mrc p15, 1, r0, c0, c0, 1 @ read clidr
102 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr
107 mov r1, r0, lsr r2 @ extract cache type bits from clidr
H A Dpsci.S193 mrc p15, 1, r0, c0, c0, 1 @ read clidr
194 ands r3, r0, #0x7000000 @ extract loc from clidr
200 mov r1, r0, lsr r2 @ extract cache type bits from clidr
/OK3568_Linux_fs/kernel/arch/arm/mm/
H A Dcache-v7.S98 mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr
101 ands r3, r3, #7 << 1 @ extract LoU*2 field from clidr
126 mrc p15, 1, r0, c0, c0, 1 @ read clidr
128 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr
134 mov r1, r0, lsr r2 @ extract cache type bits from clidr
H A Dcache-v7m.S176 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr
182 mov r1, r0, lsr r2 @ extract cache type bits from clidr
/OK3568_Linux_fs/kernel/arch/arm64/kvm/
H A Dsys_regs.c2747 struct sys_reg_desc clidr; in kvm_sys_reg_table_init() local
2771 get_clidr_el1(NULL, &clidr); /* Ugly... */ in kvm_sys_reg_table_init()
2772 cache_levels = clidr.val; in kvm_sys_reg_table_init()