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Searched refs:arm_v7s_cfg (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/iommu/
H A Dmsm_iommu.c274 SET_TTBCR(base, ctx, priv->cfg.arm_v7s_cfg.tcr); in __program_context()
275 SET_TTBR0(base, ctx, priv->cfg.arm_v7s_cfg.ttbr); in __program_context()
279 SET_PRRR(base, ctx, priv->cfg.arm_v7s_cfg.prrr); in __program_context()
280 SET_NMRR(base, ctx, priv->cfg.arm_v7s_cfg.nmrr); in __program_context()
H A Dio-pgtable-arm-v7s.c837 cfg->arm_v7s_cfg.tcr = 0; in arm_v7s_alloc_pgtable()
844 cfg->arm_v7s_cfg.prrr = ARM_V7S_PRRR_TR(1, ARM_V7S_PRRR_TYPE_DEVICE) | in arm_v7s_alloc_pgtable()
849 cfg->arm_v7s_cfg.nmrr = ARM_V7S_NMRR_IR(7, ARM_V7S_RGN_WBWA) | in arm_v7s_alloc_pgtable()
861 cfg->arm_v7s_cfg.ttbr = virt_to_phys(data->pgd) | ARM_V7S_TTBR_S | in arm_v7s_alloc_pgtable()
H A Dmtk_iommu.c491 writel(dom->cfg.arm_v7s_cfg.ttbr & MMU_PT_ADDR_MASK, in mtk_iommu_attach_device()
1003 writel(m4u_dom->cfg.arm_v7s_cfg.ttbr & MMU_PT_ADDR_MASK, base + REG_MMU_PT_BASE_ADDR); in mtk_iommu_runtime_resume()
/OK3568_Linux_fs/kernel/include/linux/
H A Dio-pgtable.h128 } arm_v7s_cfg; member
/OK3568_Linux_fs/kernel/drivers/iommu/arm/arm-smmu/
H A Darm-smmu.c473 cb->tcr[0] = pgtbl_cfg->arm_v7s_cfg.tcr; in arm_smmu_init_context_bank()
489 cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr; in arm_smmu_init_context_bank()
509 cb->mair[0] = pgtbl_cfg->arm_v7s_cfg.prrr; in arm_smmu_init_context_bank()
510 cb->mair[1] = pgtbl_cfg->arm_v7s_cfg.nmrr; in arm_smmu_init_context_bank()