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Searched refs:UART_CLK (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/kernel/arch/mips/jazz/
H A Dsetup.c91 #define UART_CLK 1843200 macro
95 #define UART_CLK (8000000 / 16) /* ( 3072000 / 16) */ macro
103 .uartclk = UART_CLK, \
/OK3568_Linux_fs/kernel/arch/sh/include/asm/
H A Dsmc37c93x.h161 #define UART_CLK (1843200) /* 1.8432 MHz */ macro
162 #define UART_BAUD(x) (UART_CLK / (16 * (x)))
/OK3568_Linux_fs/u-boot/arch/mips/mach-au1x00/
H A Dau1x00_serial.c54 volatile u32 *uart_clk = (volatile u32*)(UART0_ADDR+UART_CLK); in au1x00_serial_setbrg()
/OK3568_Linux_fs/u-boot/arch/mips/mach-au1x00/include/mach/
H A Dau1x00.h639 #define UART_CLK 0x28 /* Baud Rate Clock Divider */ macro