Searched refs:SRC1 (Results 1 – 6 of 6) sorted by relevance
| /OK3568_Linux_fs/kernel/arch/sh/kernel/cpu/sh4a/ |
| H A D | setup-sh7734.c | 327 SRC0, SRC1, enumerator
417 INTC_VECT(SRC1, 0xC80),
448 INTC_GROUP(SRC_M, SRC0, SRC1), /* 16 */
515 { HPBDMAC23_25_27_28, I2C0, SRC0, SRC1 } },
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| /OK3568_Linux_fs/kernel/include/video/ |
| H A D | trident.h | 140 #define SRC1 0x2100 macro
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| /OK3568_Linux_fs/kernel/drivers/video/fbdev/ |
| H A D | tridentfb.c | 369 writemmr(par, SRC1, direction ? s2 : s1); in blade_copy_rect()
531 writemmr(par, SRC1, direction ? s2 : s1); in image_copy_rect()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/ |
| H A D | renesas,rsnd.txt | 148 [MEM] -> [SRC1] -> [CTU02] -+-> [MIX0] -> [DVC0] -> [SSI0]
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/share/info/ |
| H A D | gcc.info | 22860 instruction with the least significant half in source register SRC1
22869 Write SRC1 into the least significant half of X and SRC2 into
22873 Write SRC1 into Y.
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/share/info/ |
| H A D | gcc.info | 22860 instruction with the least significant half in source register SRC1
22869 Write SRC1 into the least significant half of X and SRC2 into
22873 Write SRC1 into Y.
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