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Searched refs:RK3588_PLLCON (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_pll.c381 #define RK3588_PLLCON(i) ((i) * 0x4) macro
440 rk_setreg(base + pll->con_offset + RK3588_PLLCON(1), in rk3588_pll_set_rate()
446 rk_clrsetreg(base + pll->con_offset + RK3588_PLLCON(1), in rk3588_pll_set_rate()
452 rk_clrsetreg(base + pll->con_offset + RK3588_PLLCON(2), in rk3588_pll_set_rate()
457 rk_clrreg(base + pll->con_offset + RK3588_PLLCON(1), in rk3588_pll_set_rate()
461 while (!(readl(base + pll->con_offset + RK3588_PLLCON(6)) & in rk3588_pll_set_rate()
540 con = readl(base + pll->con_offset + RK3588_PLLCON(1)); in rk3588_pll_get_rate()
545 con = readl(base + pll->con_offset + RK3588_PLLCON(2)); in rk3588_pll_get_rate()
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-pll.c1271 #define RK3588_PLLCON(i) (i * 0x4) macro
1292 ret = readl_relaxed_poll_timeout(pll->reg_base + RK3588_PLLCON(6), in rockchip_rk3588_pll_wait_lock()
1316 pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(0)); in rockchip_rk3588_pll_get_params()
1320 pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(1)); in rockchip_rk3588_pll_get_params()
1326 pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(2)); in rockchip_rk3588_pll_get_params()
1389 pll->reg_base + RK3588_PLLCON(1)); in rockchip_rk3588_pll_set_params()
1394 pll->reg_base + RK3588_PLLCON(0)); in rockchip_rk3588_pll_set_params()
1400 pll->reg_base + RK3588_PLLCON(1)); in rockchip_rk3588_pll_set_params()
1404 pll->reg_base + RK3588_PLLCON(2)); in rockchip_rk3588_pll_set_params()
1409 pll->reg_base + RK3588_PLLCON(1)); in rockchip_rk3588_pll_set_params()
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