1271 #define RK3588_PLLCON(i)		(i * 0x4)  macro
1292 	ret = readl_relaxed_poll_timeout(pll->reg_base + RK3588_PLLCON(6),  in rockchip_rk3588_pll_wait_lock()
1316 	pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(0));  in rockchip_rk3588_pll_get_params()
1320 	pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(1));  in rockchip_rk3588_pll_get_params()
1326 	pllcon = readl_relaxed(pll->reg_base + RK3588_PLLCON(2));  in rockchip_rk3588_pll_get_params()
1389 	       pll->reg_base + RK3588_PLLCON(1));  in rockchip_rk3588_pll_set_params()
1394 		       pll->reg_base + RK3588_PLLCON(0));  in rockchip_rk3588_pll_set_params()
1400 		       pll->reg_base + RK3588_PLLCON(1));  in rockchip_rk3588_pll_set_params()
1404 		       pll->reg_base + RK3588_PLLCON(2));  in rockchip_rk3588_pll_set_params()
1409 	       pll->reg_base + RK3588_PLLCON(1));  in rockchip_rk3588_pll_set_params()
1458 	       pll->reg_base + RK3588_PLLCON(1));  in rockchip_rk3588_pll_enable()
1476 	       pll->reg_base + RK3588_PLLCON(1));  in rockchip_rk3588_pll_disable()
1482 	u32 pllcon = readl(pll->reg_base + RK3588_PLLCON(1));  in rockchip_rk3588_pll_is_enabled()
1557 		pllcon0 = RK3588_PLLCON(0);  in rockchip_pll_clk_compensation()
1558 		pllcon2 = RK3588_PLLCON(2);  in rockchip_pll_clk_compensation()