Searched refs:REG_SET_5x38_0_4_H_MASK_SEL (Results 1 – 2 of 2) sorted by relevance
96 #define REG_SET_5x38_0_4_H_MASK_SEL(ch, val) vd_register_set ( 0 , 0x05 + ch , 0x38 , val , 0 , 4 ) macro
354 REG_SET_5x38_0_4_H_MASK_SEL( ch, param->h_mask_sel ); in vd_vi_h_timing_set_seq5()