Searched refs:REG_SET_1x88_0_8_CLK_PRE (Results 1 – 2 of 2) sorted by relevance
144 #define REG_SET_1x88_0_8_CLK_PRE(ch, val) vd_register_set ( 0 , 0x01 , 0x88 + ch , val , 0 , 8 ) macro
548 REG_SET_1x88_0_8_CLK_PRE( ch, param->clk_pre ); in vd_vi_clock_set_seq9()