Searched refs:REG_DRAM_TRAINING_2_SW_OVRD_OFFS (Results 1 – 8 of 8) sorted by relevance
220 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_wl_supplement()452 reg &= ~(1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_wl_supplement()706 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_write_leveling_sw()832 reg &= ~(1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_write_leveling_sw()941 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_write_leveling_sw_reg_dimm()1064 reg &= ~(1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_write_leveling_sw_reg_dimm()
110 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_pbs_tx()383 reg &= ~(1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_pbs_tx()553 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_pbs_rx()682 + (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS)); in ddr3_pbs_rx()895 reg &= ~(1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_pbs_rx()
140 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_dqs_centralization_rx()195 reg &= ~(1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_dqs_centralization_rx()222 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_dqs_centralization_tx()275 reg &= ~(1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_dqs_centralization_tx()
626 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_load_patterns()645 reg &= ~(1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_load_patterns()932 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS)); in ddr3_training_suspend_resume()
238 #define REG_DRAM_TRAINING_2_SW_OVRD_OFFS 0 macro
190 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_read_leveling_sw()320 ~(1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS); in ddr3_read_leveling_sw()
651 (1 << REG_DRAM_TRAINING_2_SW_OVRD_OFFS)); in ddr3_reset_phy_read_fifo()
210 #define REG_DRAM_TRAINING_2_SW_OVRD_OFFS 0 macro