Searched refs:REG_DRAM_TRAINING_2_ECC_MUX_OFFS (Results 1 – 6 of 6) sorted by relevance
160 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_rx()162 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_rx()189 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_rx()240 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_tx()242 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_tx()269 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_tx()
161 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_tx()163 REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_tx()287 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_tx()603 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_rx()605 REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_rx()800 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_pbs_rx()
254 REG_DRAM_TRAINING_2_ECC_MUX_OFFS)); in ddr3_wl_supplement()258 REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_wl_supplement()403 REG_DRAM_TRAINING_2_ECC_MUX_OFFS)); in ddr3_wl_supplement()
209 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_read_leveling_sw()211 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_read_leveling_sw()311 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_read_leveling_sw()
237 #define REG_DRAM_TRAINING_2_ECC_MUX_OFFS 1 macro
209 #define REG_DRAM_TRAINING_2_ECC_MUX_OFFS 1 macro