Searched refs:PERILP1_HCLK_HZ (Results 1 – 2 of 2) sorted by relevance
101 #define PERILP1_HCLK_HZ (100 * MHz) macro
1461 hclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP1_HCLK_HZ) - 1; in rkclk_init()1462 assert((hclk_div + 1) * PERILP1_HCLK_HZ <= in rkclk_init()1465 pclk_div = PERILP1_HCLK_HZ / PERILP1_PCLK_HZ - 1; in rkclk_init()1467 PERILP1_HCLK_HZ && (pclk_div <= 0x7)); in rkclk_init()