Searched refs:PCIECFGREG_PM_CSR_STATE_D0 (Results 1 – 12 of 12) sorted by relevance
827 #define PCIECFGREG_PM_CSR_STATE_D0 0 macro
1007 #define PCIECFGREG_PM_CSR_STATE_D0 0 macro
1082 #define PCIECFGREG_PM_CSR_STATE_D0 0 macro
686 if (state != PCIECFGREG_PM_CSR_STATE_D0 && in dhdpcie_set_pwr_state()
1278 if (state != PCIECFGREG_PM_CSR_STATE_D0 && in dhdpcie_set_pwr_state()
1270 if (state != PCIECFGREG_PM_CSR_STATE_D0 && in dhdpcie_set_pwr_state()
1618 if (state != PCIECFGREG_PM_CSR_STATE_D0 && in dhdpcie_set_pwr_state()