Searched refs:NI_DP_MSE_RATE_CNTL (Results 1 – 2 of 2) sorted by relevance
95 #define NI_DP_MSE_RATE_CNTL 0x7384 macro
177 WREG32(NI_DP_MSE_RATE_CNTL + offset, val); in radeon_dp_mst_set_vcp_size()